From: Peter De Schrijver <pdeschrijver@nvidia.com>
To: Dmitry Osipenko <digetx@gmail.com>
Cc: Prashant Gaikwad <pgaikwad@nvidia.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, <linux-tegra@vger.kernel.org>,
<linux-clk@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v1] clk: tegra: Mark Memory Controller clock as critical
Date: Tue, 5 Jun 2018 14:20:31 +0300 [thread overview]
Message-ID: <20180605112031.GE27696@tbergstrom-lnx.Nvidia.com> (raw)
In-Reply-To: <20180603224805.495-1-digetx@gmail.com>
On Mon, Jun 04, 2018 at 01:48:05AM +0300, Dmitry Osipenko wrote:
> Memory Controller should be always-on. Currently the sibling EMC clock is
> marked as critical, let's mark MC clock too for consistency.
>
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
> ---
> drivers/clk/tegra/clk-divider.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clk/tegra/clk-divider.c b/drivers/clk/tegra/clk-divider.c
> index 16e0aee14773..58874c1bbf5e 100644
> --- a/drivers/clk/tegra/clk-divider.c
> +++ b/drivers/clk/tegra/clk-divider.c
> @@ -194,6 +194,7 @@ static const struct clk_div_table mc_div_table[] = {
> struct clk *tegra_clk_register_mc(const char *name, const char *parent_name,
> void __iomem *reg, spinlock_t *lock)
> {
> - return clk_register_divider_table(NULL, name, parent_name, 0, reg,
> - 16, 1, 0, mc_div_table, lock);
> + return clk_register_divider_table(NULL, name, parent_name,
> + CLK_IS_CRITICAL, reg, 16, 1, 0,
> + mc_div_table, lock);
> }
> --
> 2.17.0
>
> --
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next prev parent reply other threads:[~2018-06-05 11:20 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-03 22:48 [PATCH v1] clk: tegra: Mark Memory Controller clock as critical Dmitry Osipenko
2018-06-05 11:20 ` Peter De Schrijver [this message]
2018-07-09 0:09 ` Stephen Boyd
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