From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pl0-f66.google.com ([209.85.160.66]:44977 "EHLO mail-pl0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388476AbeGXSxR (ORCPT ); Tue, 24 Jul 2018 14:53:17 -0400 Received: by mail-pl0-f66.google.com with SMTP id m16-v6so2081417pls.11 for ; Tue, 24 Jul 2018 10:45:42 -0700 (PDT) From: Douglas Anderson To: sboyd@kernel.org, andy.gross@linaro.org Cc: tdas@codeaurora.org, girishm@codeaurora.org, linux-arm-msm@vger.kernel.org, anischal@codeaurora.org, bjorn.andersson@linaro.org, grahamr@codeaurora.org, linux-soc@vger.kernel.org, linux-clk@vger.kernel.org, Douglas Anderson , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Mark Rutland Subject: [PATCH v3 1/2] clk: qcom: Add qspi (Quad SPI) clock defines for sdm845 to header Date: Tue, 24 Jul 2018 10:45:12 -0700 Message-Id: <20180724174513.174018-2-dianders@chromium.org> In-Reply-To: <20180724174513.174018-1-dianders@chromium.org> References: <20180724174513.174018-1-dianders@chromium.org> Sender: linux-clk-owner@vger.kernel.org List-ID: These clocks will need to be defined in the clock driver and referenced in device tree files. Signed-off-by: Douglas Anderson --- Changes in v3: None Changes in v2: None include/dt-bindings/clock/qcom,gcc-sdm845.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/dt-bindings/clock/qcom,gcc-sdm845.h b/include/dt-bindings/clock/qcom,gcc-sdm845.h index f96fc2dbf60e..b8eae5a76503 100644 --- a/include/dt-bindings/clock/qcom,gcc-sdm845.h +++ b/include/dt-bindings/clock/qcom,gcc-sdm845.h @@ -194,6 +194,9 @@ #define GPLL4 184 #define GCC_CPUSS_DVM_BUS_CLK 185 #define GCC_CPUSS_GNOC_CLK 186 +#define GCC_QSPI_CORE_CLK_SRC 187 +#define GCC_QSPI_CORE_CLK 188 +#define GCC_QSPI_CNOC_PERIPH_AHB_CLK 189 /* GCC Resets */ #define GCC_MMSS_BCR 0 -- 2.18.0.233.g985f88cf7e-goog