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Date: Wed, 5 Sep 2018 09:21:51 +0200
From: Maxime Ripard <maxime.ripard@bootlin.com>
To: Icenowy Zheng <icenowy@aosc.io>
Cc: Chen-Yu Tsai <wens@csie.org>,
        Jagan Teki <jagan@amarulasolutions.com>,
        Jernej Skrabec <jernej.skrabec@siol.net>,
        dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
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Subject: Re: [PATCH v4 07/11] dt-bindings: clock: sun50i-a64-ccu: Add
 PLL_VIDEO0 macro
Message-ID: <20180905072151.3jqfpzuawyohov3f@flea>
References: <20180904044053.15425-1-icenowy@aosc.io>
 <20180904044053.15425-8-icenowy@aosc.io>
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On Tue, Sep 04, 2018 at 12:40:49PM +0800, Icenowy Zheng wrote:
> From: Jagan Teki <jagan@amarulasolutions.com>
>=20
> Allwinner A64 HDMI PHY clock has PLL_VIDEO0 as a parent.
>=20
> Include the macro on dt-bindings so-that the same can be used
> while defining CCU clock phandles.
>=20
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> Reviewed-by: Rob Herring <robh@kernel.org>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>

Applied, thanks!
Maxime

--=20
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

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