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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id q16sm1677072otf.35.2018.10.24.11.47.58 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 24 Oct 2018 11:47:58 -0700 (PDT) Date: Wed, 24 Oct 2018 13:47:57 -0500 From: Rob Herring To: Paul Walmsley Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, Michael Turquette , Stephen Boyd , Mark Rutland , Palmer Dabbelt , Megan Wachs , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Paul Walmsley Subject: Re: [PATCH v2 2/3] dt-bindings: clk: add documentation for the SiFive PRCI driver Message-ID: <20181024184757.GA22367@bogus> References: <20181020135024.28573-1-paul.walmsley@sifive.com> <20181020135024.28573-3-paul.walmsley@sifive.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20181020135024.28573-3-paul.walmsley@sifive.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org On Sat, Oct 20, 2018 at 06:50:23AM -0700, Paul Walmsley wrote: > Add DT binding documentation for the Linux driver for the SiFive > PRCI clock & reset control IP block, as found on the SiFive > FU540 chip. > > Cc: Michael Turquette > Cc: Stephen Boyd > Cc: Rob Herring > Cc: Mark Rutland > Cc: Palmer Dabbelt > Cc: Megan Wachs > Cc: linux-clk@vger.kernel.org > Cc: devicetree@vger.kernel.org > Cc: linux-riscv@lists.infradead.org > Cc: linux-kernel@vger.kernel.org > Signed-off-by: Paul Walmsley > Signed-off-by: Paul Walmsley > --- > v2: remove out-of-date example, add documentation for the compatible > string and for the required PCB clock nodes > > .../bindings/clock/sifive/fu540-prci.txt | 43 +++++++++++++++++++ > 1 file changed, 43 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/sifive/fu540-prci.txt > > diff --git a/Documentation/devicetree/bindings/clock/sifive/fu540-prci.txt b/Documentation/devicetree/bindings/clock/sifive/fu540-prci.txt > new file mode 100644 > index 000000000000..d7c1e83fa5ed > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/sifive/fu540-prci.txt > @@ -0,0 +1,43 @@ > +SiFive FU540 PRCI bindings > + > +On the FU540 family of SoCs, most system-wide clock and reset integration > +is via the PRCI IP block. > + > +Required properties: > +- compatible: Should be "sifive,-prci". As of the time this > + file was written, only one value is supported: > + "sifive,fu540-c000-prci0" What happens with this depends on the discussion on the other bindings. Though here you are inconsistent without a fallback. Of course, I've never seen a clock controller be the same across SoCs. > +- reg: Should describe the PRCI's register target physical address region > +- clocks: Should point to the hfclk device tree node and the rtcclk > + device tree node. The RTC clock here is not a time-of-day clock, > + but is instead a high-stability clock source for system timers > + and cycle counters. > +- #clock-cells: Should be <1> > + > +The clock consumer should specify the desired clock via the clock ID > +macros defined in include/linux/clk/sifive-fu540-prci.h. These macros > +begin with PRCI_CLK_. > + > +The hfclk and rtcclk nodes are required, and represent physical > +crystals or resonators located on the PCB. > + > +Examples: > + > +hfclk: hfclk { > + #clock-cells = <0>; > + compatible = "fixed-clock"; > + clock-frequency = <33333333>; > + clock-output-names = "hfclk"; > +}; > +rtcclk: rtcclk { > + #clock-cells = <0>; > + compatible = "fixed-clock"; > + clock-frequency = <1000000>; > + clock-output-names = "rtcclk"; > +}; > +prci0: prci@10000000 { clock-controller@... > + compatible = "sifive,fu540-c000-prci0"; > + reg = <0x0 0x10000000 0x0 0x1000>; > + clocks = <&hfclk>, <&rtcclk>; > + #clock-cells = <1>; > +}; > -- > 2.19.1 >