Re: [PATCH v2 3/5] clk: lochnagar: Add support for the Cirrus Logic Lochnagar

Charles Keepax
2018-10-11T13:26:14Z

On Thu, Oct 11, 2018 at 12:00:46AM -0700, Stephen Boyd wrote:
> Quoting Charles Keepax (2018-10-08 06:25:40)
> > +#include <linux/clk.h>
>
> Is this used?
>
> > +#include <linux/clk-provider.h>
> > +#include <linux/delay.h>
>
> Is this used?
>
> > +#include <linux/device.h>
> > +#include <linux/module.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/pm_runtime.h>
>
> Used?

Apparently not, will remove the three of them.

> > +struct lochnagar_regmap_clk {
> > + unsigned int cfg_reg;
> > + unsigned int ena_mask;
> > + unsigned int dir_mask;
> > +
> > + unsigned int src_reg;
> > + unsigned int src_mask;
>
> Are these 32 bits or 16 bits or 8 bits? Please use a u32/u16/u8 so we
> know the register width.
>

Can do.

> > +struct lochnagar_clk_priv {
> > + struct device *dev;
> > + struct lochnagar *lochnagar;
>
> Is this used for anything besides getting the regmap? Can you get the
> pointer to the parent in probe and use that to get the regmap pointer
> from dev_get_remap() and also use the of_node of the parent to register
> a clk provider? It would be nice to avoid including the mfd header file
> unless it's providing something useful.
>

It is also used to find out which type of Lochnagar we have
connected, which determines which clocks we should register. I
could perhaps pass that using another mechanism but we would
still want to include the MFD stuff to get the register
definitions. So this approach seems simplest.

> > +#define LN_CLK_FIXED(ID, NAME, RATE) \
> > + [LOCHNAGAR_##ID] = { \
> > + .name = NAME, .type = LOCHNAGAR_CLK_TYPE_FIXED, \
> > + { .fixed.rate = RATE, }, \
> > + }
>
> Can all these fixed clks come from DT instead of being populated by this
> driver? Unless they're being generated by this hardware block and not
> actually a crystal or some other on-board clock that goes into this
> hardware block and then right out of it?
>

Technically they are supplied by a clock generator chip (bunch of
PLLs) which is controlled by the board controller chip. That said
I don't really ever see them changing so will move them in DT.

> > +static int lochnagar_regmap_prepare(struct clk_hw *hw)
> > +{
> > + struct lochnagar_clk *lclk = lochnagar_hw_to_lclk(hw);
> > + struct lochnagar_clk_priv *priv = lclk->priv;
> > + struct regmap *regmap = priv->lochnagar->regmap;
> > + int ret;
> > +
> > + dev_dbg(priv->dev, "Prepare %s\n", lclk->name);
>
> Nitpick: Can you just rely on the clk tracepoints?
>

Can do they are hardly essential.

> > +
> > + if (!lclk->regmap.ena_mask)
>
> Why did we assign the ops to the clk if it can't be enabled? Please make
> different ops for different types of clks so we don't have to check
> something else and bail out early when the op is called.
>

This is a bit of a leak from earlier versions of the code I
can just remove them.

> > +static int lochnagar_regmap_set_parent(struct clk_hw *hw, u8 index)
> > +{
> > + struct lochnagar_clk *lclk = lochnagar_hw_to_lclk(hw);
> > + struct lochnagar_clk_priv *priv = lclk->priv;
> > + struct regmap *regmap = priv->lochnagar->regmap;
> > + int ret;
> > +
> > + dev_dbg(priv->dev, "Reparent %s to %s\n",
> > + lclk->name, priv->parents[index]);
> > +
> > + if (lclk->regmap.dir_mask) {
> > + ret = regmap_update_bits(regmap, lclk->regmap.cfg_reg,
> > + lclk->regmap.dir_mask,
> > + lclk->regmap.dir_mask);
> > + if (ret < 0) {
> > + dev_err(priv->dev, "Failed to set %s direction: %d\n",
>
> What does direction mean?
>

Some of the clocks can both generate and receive a clock. For
example the PSIA (external audio interface) MCLKs, the attached
device could be expecting or providing a master audio clock. If
the user assigns a parent to the clock we assume the attached
device is providing a clock to us, otherwise we assume we are
providing the clock.

> > + ret = regmap_read(regmap, lclk->regmap.src_reg, &val);
> > + if (ret < 0) {
> > + dev_err(priv->dev, "Failed to read parent of %s: %d\n",
> > + lclk->name, ret);
> > + return 0;
>
> Return a number greater than all possible parents of this clk?
>

Can do.

> > + for (i = 0; i < ARRAY_SIZE(priv->lclks); i++) {
> > + lclk = &priv->lclks[i];
> > +
> > + lclk->priv = priv;
> > +
> > + switch (lclk->type) {
> > + case LOCHNAGAR_CLK_TYPE_FIXED:
> > + clk = clk_register_fixed_rate(priv->dev, lclk->name,
> > + NULL, 0,
> > + lclk->fixed.rate);
> > + break;
> > + case LOCHNAGAR_CLK_TYPE_REGMAP:
> > + clk_init.name = lclk->name;
> > + lclk->hw.init = &clk_init;
> > +
> > + clk = devm_clk_register(priv->dev, &lclk->hw);
>
> Please use the clk_hw based registration APIs.
>

Can do.

> > +static int lochnagar_clk_remove(struct platform_device *pdev)
> > +{
> > + struct lochnagar_clk_priv *priv = platform_get_drvdata(pdev);
> > + int i;
> > +
> > + of_clk_del_provider(priv->lochnagar->dev->of_node);
>
> Use devm variant of clk provider registration?
>

This isn't using the devm version as it makes the assumption
that the device that contains the DT is the same one we want
to devm against which isn't the case here.

I could update probe to copy the of_node over from the parent, if
you prefer? I think that would also work.

> > +static struct platform_driver lochnagar_clk_driver = {
> > + .driver = {
> > + .name = "lochnagar-clk",
> > + },
>
> Any id_table?
>

Doesn't really need one since the driver will only ever be bound
in by the MFD, so matching on the driver name is fine.

Thanks,
Charles