* [PATCH] clk: imx: keep the mmdc p1 ipg clock always on on 6sx/ul/ull/sll
@ 2019-05-05 5:24 Jacky Bai
2019-05-05 6:33 ` Aisheng Dong
2019-05-20 2:25 ` Shawn Guo
0 siblings, 2 replies; 3+ messages in thread
From: Jacky Bai @ 2019-05-05 5:24 UTC (permalink / raw)
To: sboyd@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de,
festevam@gmail.com
Cc: kernel@pengutronix.de, dl-linux-imx, linux-clk@vger.kernel.org
The MMDC_P1_IPG clock need to be on always on to make sure
the MMDC register can be accessed successfully.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
---
drivers/clk/imx/clk-imx6sll.c | 2 +-
drivers/clk/imx/clk-imx6sx.c | 2 +-
drivers/clk/imx/clk-imx6ul.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/imx/clk-imx6sll.c b/drivers/clk/imx/clk-imx6sll.c
index 7eea448cb9a9..4d91e48e5918 100644
--- a/drivers/clk/imx/clk-imx6sll.c
+++ b/drivers/clk/imx/clk-imx6sll.c
@@ -307,7 +307,7 @@ static void __init imx6sll_clocks_init(struct device_node *ccm_node)
clks[IMX6SLL_CLK_WDOG1] = imx_clk_gate2("wdog1", "ipg", base + 0x74, 16);
clks[IMX6SLL_CLK_MMDC_P0_FAST] = imx_clk_gate_flags("mmdc_p0_fast", "mmdc_podf", base + 0x74, 20, CLK_IS_CRITICAL);
clks[IMX6SLL_CLK_MMDC_P0_IPG] = imx_clk_gate2_flags("mmdc_p0_ipg", "ipg", base + 0x74, 24, CLK_IS_CRITICAL);
- clks[IMX6SLL_CLK_MMDC_P1_IPG] = imx_clk_gate2("mmdc_p1_ipg", "ipg", base + 0x74, 26);
+ clks[IMX6SLL_CLK_MMDC_P1_IPG] = imx_clk_gate2_flags("mmdc_p1_ipg", "ipg", base + 0x74, 26, CLK_IS_CRITICAL);
clks[IMX6SLL_CLK_OCRAM] = imx_clk_gate_flags("ocram","ahb", base + 0x74, 28, CLK_IS_CRITICAL);
/* CCGR4 */
diff --git a/drivers/clk/imx/clk-imx6sx.c b/drivers/clk/imx/clk-imx6sx.c
index 91558b09bf9e..86f3053c37f6 100644
--- a/drivers/clk/imx/clk-imx6sx.c
+++ b/drivers/clk/imx/clk-imx6sx.c
@@ -432,7 +432,7 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
clks[IMX6SX_CLK_MLB] = imx_clk_gate2("mlb", "ahb", base + 0x74, 18);
clks[IMX6SX_CLK_MMDC_P0_FAST] = imx_clk_gate2_flags("mmdc_p0_fast", "mmdc_podf", base + 0x74, 20, CLK_IS_CRITICAL);
clks[IMX6SX_CLK_MMDC_P0_IPG] = imx_clk_gate2_flags("mmdc_p0_ipg", "ipg", base + 0x74, 24, CLK_IS_CRITICAL);
- clks[IMX6SX_CLK_MMDC_P1_IPG] = imx_clk_gate2("mmdc_p1_ipg", "ipg", base + 0x74, 26);
+ clks[IMX6SX_CLK_MMDC_P1_IPG] = imx_clk_gate2_flags("mmdc_p1_ipg", "ipg", base + 0x74, 26, CLK_IS_CRITICAL);
clks[IMX6SX_CLK_OCRAM] = imx_clk_gate2_flags("ocram", "ocram_podf", base + 0x74, 28, CLK_IS_CRITICAL);
/* CCGR4 */
diff --git a/drivers/clk/imx/clk-imx6ul.c b/drivers/clk/imx/clk-imx6ul.c
index fd60d1549f71..35377c6b50b8 100644
--- a/drivers/clk/imx/clk-imx6ul.c
+++ b/drivers/clk/imx/clk-imx6ul.c
@@ -408,7 +408,7 @@ static void __init imx6ul_clocks_init(struct device_node *ccm_node)
clks[IMX6UL_CLK_WDOG1] = imx_clk_gate2("wdog1", "ipg", base + 0x74, 16);
clks[IMX6UL_CLK_MMDC_P0_FAST] = imx_clk_gate_flags("mmdc_p0_fast", "mmdc_podf", base + 0x74, 20, CLK_IS_CRITICAL);
clks[IMX6UL_CLK_MMDC_P0_IPG] = imx_clk_gate2_flags("mmdc_p0_ipg", "ipg", base + 0x74, 24, CLK_IS_CRITICAL);
- clks[IMX6UL_CLK_MMDC_P1_IPG] = imx_clk_gate2("mmdc_p1_ipg", "ipg", base + 0x74, 26);
+ clks[IMX6UL_CLK_MMDC_P1_IPG] = imx_clk_gate2_flags("mmdc_p1_ipg", "ipg", base + 0x74, 26, CLK_IS_CRITICAL);
clks[IMX6UL_CLK_AXI] = imx_clk_gate_flags("axi", "axi_podf", base + 0x74, 28, CLK_IS_CRITICAL);
/* CCGR4 */
--
2.21.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
* RE: [PATCH] clk: imx: keep the mmdc p1 ipg clock always on on 6sx/ul/ull/sll
2019-05-05 5:24 [PATCH] clk: imx: keep the mmdc p1 ipg clock always on on 6sx/ul/ull/sll Jacky Bai
@ 2019-05-05 6:33 ` Aisheng Dong
2019-05-20 2:25 ` Shawn Guo
1 sibling, 0 replies; 3+ messages in thread
From: Aisheng Dong @ 2019-05-05 6:33 UTC (permalink / raw)
To: Jacky Bai, sboyd@kernel.org, shawnguo@kernel.org,
s.hauer@pengutronix.de, festevam@gmail.com
Cc: kernel@pengutronix.de, dl-linux-imx, linux-clk@vger.kernel.org
> From: Jacky Bai
> Sent: Sunday, May 5, 2019 1:25 PM
>
> The MMDC_P1_IPG clock need to be on always on to make sure the MMDC
> register can be accessed successfully.
>
> Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Regards
Dong Aisheng
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] clk: imx: keep the mmdc p1 ipg clock always on on 6sx/ul/ull/sll
2019-05-05 5:24 [PATCH] clk: imx: keep the mmdc p1 ipg clock always on on 6sx/ul/ull/sll Jacky Bai
2019-05-05 6:33 ` Aisheng Dong
@ 2019-05-20 2:25 ` Shawn Guo
1 sibling, 0 replies; 3+ messages in thread
From: Shawn Guo @ 2019-05-20 2:25 UTC (permalink / raw)
To: Jacky Bai
Cc: sboyd@kernel.org, s.hauer@pengutronix.de, festevam@gmail.com,
kernel@pengutronix.de, dl-linux-imx, linux-clk@vger.kernel.org
On Sun, May 05, 2019 at 05:24:38AM +0000, Jacky Bai wrote:
> The MMDC_P1_IPG clock need to be on always on to make sure
> the MMDC register can be accessed successfully.
>
> Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Please resend with no use of base64 encoding.
Shawn
> ---
> drivers/clk/imx/clk-imx6sll.c | 2 +-
> drivers/clk/imx/clk-imx6sx.c | 2 +-
> drivers/clk/imx/clk-imx6ul.c | 2 +-
> 3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/clk/imx/clk-imx6sll.c b/drivers/clk/imx/clk-imx6sll.c
> index 7eea448cb9a9..4d91e48e5918 100644
> --- a/drivers/clk/imx/clk-imx6sll.c
> +++ b/drivers/clk/imx/clk-imx6sll.c
> @@ -307,7 +307,7 @@ static void __init imx6sll_clocks_init(struct device_node *ccm_node)
> clks[IMX6SLL_CLK_WDOG1] = imx_clk_gate2("wdog1", "ipg", base + 0x74, 16);
> clks[IMX6SLL_CLK_MMDC_P0_FAST] = imx_clk_gate_flags("mmdc_p0_fast", "mmdc_podf", base + 0x74, 20, CLK_IS_CRITICAL);
> clks[IMX6SLL_CLK_MMDC_P0_IPG] = imx_clk_gate2_flags("mmdc_p0_ipg", "ipg", base + 0x74, 24, CLK_IS_CRITICAL);
> - clks[IMX6SLL_CLK_MMDC_P1_IPG] = imx_clk_gate2("mmdc_p1_ipg", "ipg", base + 0x74, 26);
> + clks[IMX6SLL_CLK_MMDC_P1_IPG] = imx_clk_gate2_flags("mmdc_p1_ipg", "ipg", base + 0x74, 26, CLK_IS_CRITICAL);
> clks[IMX6SLL_CLK_OCRAM] = imx_clk_gate_flags("ocram","ahb", base + 0x74, 28, CLK_IS_CRITICAL);
>
> /* CCGR4 */
> diff --git a/drivers/clk/imx/clk-imx6sx.c b/drivers/clk/imx/clk-imx6sx.c
> index 91558b09bf9e..86f3053c37f6 100644
> --- a/drivers/clk/imx/clk-imx6sx.c
> +++ b/drivers/clk/imx/clk-imx6sx.c
> @@ -432,7 +432,7 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
> clks[IMX6SX_CLK_MLB] = imx_clk_gate2("mlb", "ahb", base + 0x74, 18);
> clks[IMX6SX_CLK_MMDC_P0_FAST] = imx_clk_gate2_flags("mmdc_p0_fast", "mmdc_podf", base + 0x74, 20, CLK_IS_CRITICAL);
> clks[IMX6SX_CLK_MMDC_P0_IPG] = imx_clk_gate2_flags("mmdc_p0_ipg", "ipg", base + 0x74, 24, CLK_IS_CRITICAL);
> - clks[IMX6SX_CLK_MMDC_P1_IPG] = imx_clk_gate2("mmdc_p1_ipg", "ipg", base + 0x74, 26);
> + clks[IMX6SX_CLK_MMDC_P1_IPG] = imx_clk_gate2_flags("mmdc_p1_ipg", "ipg", base + 0x74, 26, CLK_IS_CRITICAL);
> clks[IMX6SX_CLK_OCRAM] = imx_clk_gate2_flags("ocram", "ocram_podf", base + 0x74, 28, CLK_IS_CRITICAL);
>
> /* CCGR4 */
> diff --git a/drivers/clk/imx/clk-imx6ul.c b/drivers/clk/imx/clk-imx6ul.c
> index fd60d1549f71..35377c6b50b8 100644
> --- a/drivers/clk/imx/clk-imx6ul.c
> +++ b/drivers/clk/imx/clk-imx6ul.c
> @@ -408,7 +408,7 @@ static void __init imx6ul_clocks_init(struct device_node *ccm_node)
> clks[IMX6UL_CLK_WDOG1] = imx_clk_gate2("wdog1", "ipg", base + 0x74, 16);
> clks[IMX6UL_CLK_MMDC_P0_FAST] = imx_clk_gate_flags("mmdc_p0_fast", "mmdc_podf", base + 0x74, 20, CLK_IS_CRITICAL);
> clks[IMX6UL_CLK_MMDC_P0_IPG] = imx_clk_gate2_flags("mmdc_p0_ipg", "ipg", base + 0x74, 24, CLK_IS_CRITICAL);
> - clks[IMX6UL_CLK_MMDC_P1_IPG] = imx_clk_gate2("mmdc_p1_ipg", "ipg", base + 0x74, 26);
> + clks[IMX6UL_CLK_MMDC_P1_IPG] = imx_clk_gate2_flags("mmdc_p1_ipg", "ipg", base + 0x74, 26, CLK_IS_CRITICAL);
> clks[IMX6UL_CLK_AXI] = imx_clk_gate_flags("axi", "axi_podf", base + 0x74, 28, CLK_IS_CRITICAL);
>
> /* CCGR4 */
> --
> 2.21.0
>
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2019-05-20 2:26 UTC | newest]
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2019-05-05 5:24 [PATCH] clk: imx: keep the mmdc p1 ipg clock always on on 6sx/ul/ull/sll Jacky Bai
2019-05-05 6:33 ` Aisheng Dong
2019-05-20 2:25 ` Shawn Guo
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