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[2.207.138.2]) by smtp.gmail.com with ESMTPSA id z14sm8420219wrg.76.2020.02.28.01.36.21 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 28 Feb 2020 01:36:21 -0800 (PST) Date: Fri, 28 Feb 2020 10:14:29 +0100 From: Oliver Graute To: Anson Huang Cc: Aisheng Dong , "festevam@gmail.com" , dl-linux-imx , "linux-clk@vger.kernel.org" , "s.hauer@pengutronix.de" , "mturquette@baylibre.com" , Leonard Crestez , "linux-arm-kernel@lists.infradead.org" Subject: Re: RFC: imx8qm: imx-scu-clk: probe of clk failed Message-ID: <20200228091429.GE16310@optiplex> References: <20200227125743.GC16310@optiplex> <20200227153110.GD16310@optiplex> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org On 28/02/20, Anson Huang wrote: > Hi, Oliver > > > Subject: Re: RFC: imx8qm: imx-scu-clk: probe of clk failed > > > > On 27/02/20, Oliver Graute wrote: > > > Hello Aisheng, > > > Hello Anson, > > > > > > I get the following imx-scu errors when using Linux version > > > 5.6.0-rc1-next-20200214 with scfw Build 3353, Commit 494c97f3 > > > > > > It seems that important clocks are off somehow and that lpspi isn't > > > working because of that. What is the best way to debug such issues? > > > > > > [ 1.103799] imx-scu scu: NXP i.MX SCU Initialized > > > [ 1.111383] a35_clk: failed to get clock rate -22 > > > > After some deeper digging I saw that the reason for "a35_clk: failed" is an > > IMX_SC_ERR_PARM = 3. Because he trys to get the resource SC_R_A35 which > > is only available on imx8qxp and not on imx8qm. No clue why he try that > > instead of SC_R_A53. > > You are running on i.MX8QM board, right? Is it because the A35/A53/A72 clocks > are registered on same clock driver, so that clock core will calculate their rate during > clock tree setup? But even A35 clock get rate failed on i.MX8QM, I don't see it will > impact lpspi. yes I'am using a i.MX8QM based board. Which clocks are needed to get lpspi working on imx8qm? > > i.MX8QM is already supported on our internal v5.4 tree, there are some > changes in clk-scu.c, I pasted some code piece as below, maybe you can > compare the difference and have a try? ok I use your proposed code now. A struct clk_scu_pi_ops is missing for me here. Also I added this: --- a/include/dt-bindings/clock/imx8-clock.h +++ b/include/dt-bindings/clock/imx8-clock.h @@ -131,7 +131,9 @@ #define IMX_ADMA_PWM_CLK 188 #define IMX_ADMA_LCD_CLK 189 -#define IMX_SCU_CLK_END 190 +#define IMX_A53_CLK 190 +#define IMX_A72_CLK 191 +#define IMX_SCU_CLK_END 192 --- a/drivers/clk/imx/clk-imx8qxp.c +++ b/drivers/clk/imx/clk-imx8qxp.c @@ -60,6 +68,8 @@ static int imx8qxp_clk_probe(struct platform_device *pdev) /* ARM core */ clks[IMX_A35_CLK] = imx_clk_scu("a35_clk", IMX_SC_R_A35, IMX_SC_PM_CLK_CPU, clk_cells); + clks[IMX_A53_CLK] = imx_clk_scu("a53_clk", IMX_SC_R_A53, IMX_SC_PM_CLK_CPU, clk_cells); + clks[IMX_A72_CLK] = imx_clk_scu("a72_clk", IMX_SC_R_A72, IMX_SC_PM_CLK_CPU, clk_cells); Is it correct to use the imx8qxp clock probing here? Best regards, Oliver