From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.6 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 58236C433E1 for ; Mon, 24 Aug 2020 10:31:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2BC7920639 for ; Mon, 24 Aug 2020 10:31:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1598265089; bh=JHmmYdal4LDDL/vAFzi2LbhOBMpq0JX2Bs7bja/+Fnw=; h=Date:From:To:Cc:Subject:References:In-Reply-To:List-ID:From; b=hnv+Zt2bl4401TI0ua4Xv6N3iLqpfzQNvwlAi2XG9QTd5fzzlDgFdzBOyKY5CPQs4 hqoW+tYdVwagahjXl/6sbEM2X+XTMmSFBfK+aAs8pa4CVG7CB3pa3QX+aHKf+989JL Ba58YFYR5q4rMFO8r6Nfcb0IXJ6Q3pPXitO89QSc= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726138AbgHXKb2 (ORCPT ); Mon, 24 Aug 2020 06:31:28 -0400 Received: from mail-wr1-f68.google.com ([209.85.221.68]:37055 "EHLO mail-wr1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725968AbgHXKb2 (ORCPT ); Mon, 24 Aug 2020 06:31:28 -0400 Received: by mail-wr1-f68.google.com with SMTP id y3so8118250wrl.4; Mon, 24 Aug 2020 03:31:26 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=5xLQKYZI4cTxrUMmil7wS5imap+Bt2COqeo1cf8n/LM=; b=N/UgocIsOgBmrL+mAZIkdG1IEfTi3ls1nm+wuQEw3txfQ/KVm/OVEjZMrhkSRVfSdQ uiVXdVnwUfV6hlSa9zffsrHUuKblyuvzOQiv4MoPm8JaCZNr9YDNILQPk3knhnlpCeBH J1XKSza5ykN+iHxeru1FTZKrC/uwei5lUUWWfjaJrqP1IS3GICMrUp9RPgvhvp2r78I/ 9k3vNmua5n7d81qJf25DizkMCqBB0f4grw0WYYOy1K3T13LQsWsHSpObi/Pwdq1ujpVG ZEf8EhTurnbWl7tJ70biN9ymvHTm2/EmtinfAMA4tQnPTrdt7bEzfrC1UYrcO3bMAMB3 NqvQ== X-Gm-Message-State: AOAM531/ZAQe9B9+RfdTtGTsBYZnuDvqL4yQgYPBlJb9Uw1jMQEXfQaV Ls8u1i1Atd2aHqF5nhZtWL0= X-Google-Smtp-Source: ABdhPJyn5rnoR81LuJKvJbEUHHChIoVEuMpVbYFRx+shF6dp99Pu2+sob1nRK1HuIR1Wj5ZBPFj8GQ== X-Received: by 2002:adf:ec10:: with SMTP id x16mr5016091wrn.74.1598265086281; Mon, 24 Aug 2020 03:31:26 -0700 (PDT) Received: from kozik-lap ([194.230.155.216]) by smtp.googlemail.com with ESMTPSA id k15sm20428005wrp.43.2020.08.24.03.31.25 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 24 Aug 2020 03:31:25 -0700 (PDT) Date: Mon, 24 Aug 2020 12:31:23 +0200 From: Krzysztof Kozlowski To: Sylwester Nawrocki Cc: Stephen Boyd , linux-samsung-soc@vger.kernel.org, Marek Szyprowski , linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Chanwoo Choi , Bartlomiej Zolnierkiewicz , Lukasz Luba Subject: Re: [PATCH v2] clk: samsung: Keep top BPLL mux on Exynos542x enabled Message-ID: <20200824103123.GD25860@kozik-lap> References: <20200807133143.22748-1-m.szyprowski@samsung.com> <159780685238.334488.5802955284004610550@swboyd.mtv.corp.google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org On Mon, Aug 24, 2020 at 12:28:51PM +0200, Sylwester Nawrocki wrote: > On 8/23/20 12:12, Sylwester Nawrocki wrote: > > On 8/19/20 05:14, Stephen Boyd wrote: > > > Quoting Marek Szyprowski (2020-08-07 06:31:43) > > > > BPLL clock must not be disabled because it is needed for proper DRAM > > > > operation. This is normally handled by respective memory devfreq driver, > > > > but when that driver is not yet probed or its probe has been > > > > deferred the > > > > clock might got disabled what causes board hang. Fix this by calling > > > > clk_prepare_enable() directly from the clock provider driver. > > > > > > > > Signed-off-by: Marek Szyprowski > > > > Reviewed-by: Lukasz Luba > > > > Tested-by: Lukasz Luba > > > > Acked-by: Krzysztof Kozlowski > > > > --- > > > > > > Can I pick this up for clk-fixes? > > > > Sure, thanks for taking care of this. > > OTOH, I planned to queue that patch for next merged window, together with a > patch that depends on that one, since the fix is not for an issue > introduced in the last merge window. > I guess it's better to avoid pulling (part of) the clk-fixes branch to > the clk/samsung tree for next merge window? All current multi_v7 and some of exynos defconfig boots fail on Odroid XU3-family, starting from v5.9-rc1. On kernelci and my boot systems. If I understand correctly, this is a fix for this issue, so it should go as fast as possible to v5.9 cycle. Otherwise we cannot test anything. The current v5.9 RC is then simply broken. Best regards, Krzysztof