[PATCH v1 1/2] dt-bindings: CLK: microchip: Add Microchip PolarFire host binding

[<daire.mcnamara@microchip.com>]

From: Daire McNamara <daire.mcnamara@microchip.com>

    Add device tree bindings for the Microchip PolarFire system
    clock controller

    Signed-off-by: Daire McNamara <daire.mcnamara@microchip.com>
---
 .../bindings/clock/microchip,pfsoc.yaml       | 70 +++++++++++++++++++
 1 file changed, 70 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/microchip,pfsoc.yaml

diff --git a/Documentation/devicetree/bindings/clock/microchip,pfsoc.yaml b/Documentation/devicetree/bindings/clock/microchip,pfsoc.yaml
new file mode 100644
index 000000000000..c833e7b6a7cd
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/microchip,pfsoc.yaml
@@ -0,0 +1,70 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/microchip,pfsoc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Microchip PolarFire Clock Control Module Binding
+
+maintainers:
+  - Daire McNamara <daire.mcnamara@microchip.com>
+
+description: |
+  Microchip PolarFire clock control is an integrated clock controller, which
+  generates clocks and supplies to all peripherals.
+
+properties:
+  compatible:
+    const: microchip,pfsoc-clkcfg
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    items:
+      - description: reference clock input
+
+  clock-names:
+    items:
+      - const: ref_clk
+
+  '#clock-cells':
+    const: 1
+    description: |
+      The clock consumer should specify the desired clock by having the clock
+      ID in its "clocks" phandle cell. See include/dt-bindings/clock/microchip,pfsoc-clock.h
+      for the full list of PolarFire clock IDs.
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+  - '#clock-cells'
+
+examples:
+  # Clock Config node:
+  - |
+    soc {
+            #address-cells = <2>;
+            #size-cells = <2>;
+            clkcfg: clock-controller@20002000 {
+                compatible = "microchip,pfsoc-clkcfg";
+                reg = <0x0 0x20002000 0x0 0x1000>;
+                reg-names = "mss_sysreg";
+                clocks = <&ref_clk 0>;
+                clock-names = "ref_clk";
+                #clock-cells = <1>;
+                clock-output-names = "cpu", "axi", "ahb", "envm", "mac0", "mac1", "mmc", "timer", "mmuart0", "mmuart1", "mmuart2", "mmuart3", "mmuart4", "spi0", "spi1", "i2c0", "i2c1", "can0", "can1", "usb", "rtc", "qspi", "gpio0", "gpio1", "gpio2", "ddrc", "fic0", "fic1", "fic2", "fic3", "athena", "cfm";
+        };
+    };
+
+  # Required external clocks for Clock Control Module node:
+  - |
+    refclk: refclk {
+        compatible = "fixed-clock";
+        #clock-cells = <0>;
+        clock-frequency = <600000000>;
+        clock-output-names = "msspllclk";
+    };
+...
-- 
2.25.1