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From: Rob Herring <robh@kernel.org>
To: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Luca Ceresoli <luca@lucaceresoli.net>,
	Adam Ford <aford173@gmail.com>, Stephen Boyd <sboyd@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
	Michael Turquette <mturquette@baylibre.com>,
	linux-clk@vger.kernel.org
Subject: Re: [PATCH v3] dt-bindings: clk: versaclock5: Miscellaneous fixes and improvements:
Date: Thu, 4 Feb 2021 09:57:59 -0600	[thread overview]
Message-ID: <20210204155759.GA519221@robh.at.kernel.org> (raw)
In-Reply-To: <20210126163955.1933893-1-geert+renesas@glider.be>

On Tue, 26 Jan 2021 17:39:55 +0100, Geert Uytterhoeven wrote:
>   - Remove unneeded reference for "idt,slew-percent", as vendor specific
>     properties having a standard unit suffix don't need a type,
>   - Add missing "additionalProperties: false" for subnodes, to catch
>     typos in properties,
>   - Fix property names in example.
> 
> Fixes: 45c940184b501fc6 ("dt-bindings: clk: versaclock5: convert to yaml")
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> This depends on "[PATCH dt-schema 0/2] dt-schema: Add percentage"
> https://lore.kernel.org/r/20210126162756.1932692-1-geert+renesas@glider.be
> 
> v3:
>   - Drop references for "idt,voltage-microvolt" and "idt,slew-percent",
> 
> v2:
>   - Settle on "idt,voltage-microvolt", cfr. commit 4b003f5fcadfa2d0
>     ('clk: vc5: Use "idt,voltage-microvolt" instead of
>     "idt,voltage-microvolts"'),
>   - Drop reference to clock.yaml, which is already applied
>     unconditionally,
>   - Drop removal of allOf around if condition, as it is unnecessary
>     churn.
> ---
>  .../devicetree/bindings/clock/idt,versaclock5.yaml       | 9 +++++----
>  1 file changed, 5 insertions(+), 4 deletions(-)
> 

Reviewed-by: Rob Herring <robh@kernel.org>

  parent reply	other threads:[~2021-02-04 15:58 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-26 16:39 [PATCH v3] dt-bindings: clk: versaclock5: Miscellaneous fixes and improvements: Geert Uytterhoeven
2021-01-27 14:00 ` Rob Herring
2021-01-27 14:23   ` Geert Uytterhoeven
2021-01-27 14:36 ` Luca Ceresoli
2021-02-04 15:57 ` Rob Herring [this message]
2021-02-05  3:25 ` Stephen Boyd

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