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From: Stephen Boyd <sboyd@kernel.org>
To: Michael Turquette <mturquette@baylibre.com>,
	Taniya Das <tdas@codeaurora.org>
Cc: Rajendra Nayak <rnayak@codeaurora.org>,
	linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org,
	linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, robh@kernel.org, robh+dt@kernel.org,
	Taniya Das <tdas@codeaurora.org>
Subject: Re: [PATCH v2 5/5] clk: qcom: lpass: Add support for LPASS clock controller for SC7280
Date: Wed, 05 Jan 2022 16:02:38 -0800	[thread overview]
Message-ID: <20220106000239.B6D33C36AEB@smtp.kernel.org> (raw)
In-Reply-To: <1640018638-19436-6-git-send-email-tdas@codeaurora.org>

Quoting Taniya Das (2021-12-20 08:43:58)
> diff --git a/drivers/clk/qcom/lpasscorecc-sc7280.c b/drivers/clk/qcom/lpasscorecc-sc7280.c
> new file mode 100644
> index 0000000..dd79847
> --- /dev/null
> +++ b/drivers/clk/qcom/lpasscorecc-sc7280.c
> @@ -0,0 +1,433 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (c) 2021, The Linux Foundation. All rights reserved.
> + */
> +
[...]
> +       [LPASS_CORE_CC_EXT_IF0_CLK_SRC] = &lpass_core_cc_ext_if0_clk_src.clkr,
> +       [LPASS_CORE_CC_EXT_IF0_IBIT_CLK] = &lpass_core_cc_ext_if0_ibit_clk.clkr,
> +       [LPASS_CORE_CC_EXT_IF1_CLK_SRC] = &lpass_core_cc_ext_if1_clk_src.clkr,
> +       [LPASS_CORE_CC_EXT_IF1_IBIT_CLK] = &lpass_core_cc_ext_if1_ibit_clk.clkr,
> +       [LPASS_CORE_CC_LPM_CORE_CLK] = &lpass_core_cc_lpm_core_clk.clkr,
> +       [LPASS_CORE_CC_LPM_MEM0_CORE_CLK] = &lpass_core_cc_lpm_mem0_core_clk.clkr,
> +       [LPASS_CORE_CC_SYSNOC_MPORT_CORE_CLK] = &lpass_core_cc_sysnoc_mport_core_clk.clkr,
> +};
> +
> +static struct regmap_config lpass_core_cc_sc7280_regmap_config = {

Can this be const?

> +       .reg_bits = 32,
> +       .reg_stride = 4,
> +       .val_bits = 32,
> +       .fast_io = true,

Any .max_register?

> +};
> +
> +static const struct qcom_cc_desc lpass_core_cc_sc7280_desc = {
> +       .config = &lpass_core_cc_sc7280_regmap_config,
> +       .clks = lpass_core_cc_sc7280_clocks,
> +       .num_clks = ARRAY_SIZE(lpass_core_cc_sc7280_clocks),
> +};
> +
> +static const struct of_device_id lpass_core_cc_sc7280_match_table[] = {
> +       { .compatible = "qcom,sc7280-lpasscorecc" },
> +       { }
> +};
> +MODULE_DEVICE_TABLE(of, lpass_core_cc_sc7280_match_table);
> +
> +static struct gdsc *lpass_core_hm_sc7280_gdscs[] = {
> +       [LPASS_CORE_CC_LPASS_CORE_HM_GDSC] = &lpass_core_cc_lpass_core_hm_gdsc,
> +};
> +
> +static const struct qcom_cc_desc lpass_core_hm_sc7280_desc = {
> +       .config = &lpass_core_cc_sc7280_regmap_config,
> +       .gdscs = lpass_core_hm_sc7280_gdscs,
> +       .num_gdscs = ARRAY_SIZE(lpass_core_hm_sc7280_gdscs),
> +};
> +
> +static int lpass_core_cc_sc7280_probe(struct platform_device *pdev)
> +{
> +       struct regmap *regmap;
> +
> +       regmap = qcom_cc_map(pdev, &lpass_core_cc_sc7280_desc);
> +       if (IS_ERR(regmap))
> +               return PTR_ERR(regmap);
> +
> +       clk_lucid_pll_configure(&lpass_core_cc_dig_pll, regmap, &lpass_core_cc_dig_pll_config);
> +
> +       return qcom_cc_really_probe(pdev, &lpass_core_cc_sc7280_desc, regmap);
> +}
> +
> +static struct platform_driver lpass_core_cc_sc7280_driver = {
> +       .probe = lpass_core_cc_sc7280_probe,
> +       .driver = {
> +               .name = "lpass_core_cc-sc7280",
> +               .of_match_table = lpass_core_cc_sc7280_match_table,
> +       },
> +};
> +
> +static int lpass_hm_core_probe(struct platform_device *pdev)
> +{
> +       const struct qcom_cc_desc *desc;
> +       int ret;
> +
> +       lpass_core_cc_sc7280_regmap_config.name = "lpass_hm_core";
> +       desc = &lpass_core_hm_sc7280_desc;
> +
> +       ret = qcom_cc_probe_by_index(pdev, 0, desc);

Why don't we use the desc directly here?

> +       if (ret)
> +               goto destroy_clk;
> +
> +       return 0;
> +
> +destroy_clk:
> +       return ret;

This can be simplified and the goto removed.

> +}
> +

      parent reply	other threads:[~2022-01-06  0:02 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-20 16:43 [PATCH v2 0/5] Add support for LPASS Core and Audio Clock for SC7280 Taniya Das
2021-12-20 16:43 ` [PATCH v2 1/5] clk: qcom: clk-alpha-pll: Increase PLL lock detect poll time Taniya Das
2022-01-05 23:56   ` Stephen Boyd
2022-01-06  1:19   ` Stephen Boyd
2021-12-20 16:43 ` [PATCH v2 2/5] clk: Enable/Disable runtime PM for clk_summary Taniya Das
2022-01-06  1:20   ` Stephen Boyd
2021-12-20 16:43 ` [PATCH v2 3/5] clk: qcom: gcc-sc7280: Mark gcc_cfg_noc_lpass_clk always enabled Taniya Das
2022-01-06  1:20   ` Stephen Boyd
2021-12-20 16:43 ` [PATCH v2 4/5] dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280 Taniya Das
2021-12-20 16:43 ` [PATCH v2 5/5] clk: qcom: lpass: Add support for LPASS clock controller for SC7280 Taniya Das
2021-12-21  1:02   ` kernel test robot
2022-01-06  0:03     ` Stephen Boyd
2021-12-31  2:17   ` kernel test robot
2022-01-06  0:02   ` Stephen Boyd [this message]

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