From: Maxime Ripard <maxime@cerno.tech>
To: Mike Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>
Cc: linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org,
Dave Stevenson <dave.stevenson@raspberrypi.com>,
Phil Elwell <phil@raspberrypi.com>,
Tim Gover <tim.gover@raspberrypi.com>,
Dom Cobley <dom@raspberrypi.com>,
Maxime Ripard <maxime@cerno.tech>
Subject: [PATCH v3 06/10] clk: bcm: rpi: Add variant structure
Date: Thu, 20 Jan 2022 15:34:13 +0100 [thread overview]
Message-ID: <20220120143417.543744-7-maxime@cerno.tech> (raw)
In-Reply-To: <20220120143417.543744-1-maxime@cerno.tech>
We only export a bunch of firmware clocks, and some of them require
special treatment.
This has been do so far using some tests on the clock id in various
places, but this is fairly hard to extend and doesn't scale very well.
Since we'll need some more cases in the next patches, let's switch to a
variant structure that defines the behaviour we need to have for a given
clock.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
drivers/clk/bcm/clk-raspberrypi.c | 62 +++++++++++++++++++++++--------
1 file changed, 46 insertions(+), 16 deletions(-)
diff --git a/drivers/clk/bcm/clk-raspberrypi.c b/drivers/clk/bcm/clk-raspberrypi.c
index dd3b71eafabf..f7185d421085 100644
--- a/drivers/clk/bcm/clk-raspberrypi.c
+++ b/drivers/clk/bcm/clk-raspberrypi.c
@@ -56,6 +56,8 @@ static char *rpi_firmware_clk_names[] = {
#define RPI_FIRMWARE_STATE_ENABLE_BIT BIT(0)
#define RPI_FIRMWARE_STATE_WAIT_BIT BIT(1)
+struct raspberrypi_clk_variant;
+
struct raspberrypi_clk {
struct device *dev;
struct rpi_firmware *firmware;
@@ -66,10 +68,36 @@ struct raspberrypi_clk_data {
struct clk_hw hw;
unsigned int id;
+ struct raspberrypi_clk_variant *variant;
struct raspberrypi_clk *rpi;
};
+struct raspberrypi_clk_variant {
+ bool export;
+ char *clkdev;
+};
+
+static struct raspberrypi_clk_variant
+raspberrypi_clk_variants[RPI_FIRMWARE_NUM_CLK_ID] = {
+ [RPI_FIRMWARE_ARM_CLK_ID] = {
+ .export = true,
+ .clkdev = "cpu0",
+ },
+ [RPI_FIRMWARE_CORE_CLK_ID] = {
+ .export = true,
+ },
+ [RPI_FIRMWARE_M2MC_CLK_ID] = {
+ .export = true,
+ },
+ [RPI_FIRMWARE_V3D_CLK_ID] = {
+ .export = true,
+ },
+ [RPI_FIRMWARE_PIXEL_BVB_CLK_ID] = {
+ .export = true,
+ },
+};
+
/*
* Structure of the message passed to Raspberry Pi's firmware in order to
* change clock rates. The 'disable_turbo' option is only available to the ARM
@@ -183,7 +211,8 @@ static const struct clk_ops raspberrypi_firmware_clk_ops = {
static struct clk_hw *raspberrypi_clk_register(struct raspberrypi_clk *rpi,
unsigned int parent,
- unsigned int id)
+ unsigned int id,
+ struct raspberrypi_clk_variant *variant)
{
struct raspberrypi_clk_data *data;
struct clk_init_data init = {};
@@ -195,6 +224,7 @@ static struct clk_hw *raspberrypi_clk_register(struct raspberrypi_clk *rpi,
return ERR_PTR(-ENOMEM);
data->rpi = rpi;
data->id = id;
+ data->variant = variant;
init.name = devm_kasprintf(rpi->dev, GFP_KERNEL,
"fw-clk-%s",
@@ -228,9 +258,9 @@ static struct clk_hw *raspberrypi_clk_register(struct raspberrypi_clk *rpi,
clk_hw_set_rate_range(&data->hw, min_rate, max_rate);
- if (id == RPI_FIRMWARE_ARM_CLK_ID) {
+ if (variant->clkdev) {
ret = devm_clk_hw_register_clkdev(rpi->dev, &data->hw,
- NULL, "cpu0");
+ NULL, variant->clkdev);
if (ret) {
dev_err(rpi->dev, "Failed to initialize clkdev\n");
return ERR_PTR(ret);
@@ -264,27 +294,27 @@ static int raspberrypi_discover_clocks(struct raspberrypi_clk *rpi,
return ret;
while (clks->id) {
- struct clk_hw *hw;
+ struct raspberrypi_clk_variant *variant;
+
+ if (clks->id > RPI_FIRMWARE_NUM_CLK_ID) {
+ dev_err(rpi->dev, "Unknown clock id: %u", clks->id);
+ return -EINVAL;
+ }
+
+ variant = &raspberrypi_clk_variants[clks->id];
+ if (variant->export) {
+ struct clk_hw *hw;
- switch (clks->id) {
- case RPI_FIRMWARE_ARM_CLK_ID:
- case RPI_FIRMWARE_CORE_CLK_ID:
- case RPI_FIRMWARE_M2MC_CLK_ID:
- case RPI_FIRMWARE_V3D_CLK_ID:
- case RPI_FIRMWARE_PIXEL_BVB_CLK_ID:
hw = raspberrypi_clk_register(rpi, clks->parent,
- clks->id);
+ clks->id, variant);
if (IS_ERR(hw))
return PTR_ERR(hw);
data->hws[clks->id] = hw;
data->num = clks->id + 1;
- fallthrough;
-
- default:
- clks++;
- break;
}
+
+ clks++;
}
return 0;
--
2.34.1
next prev parent reply other threads:[~2022-01-20 14:34 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-20 14:34 [PATCH v3 00/10] clk: Improve clock range handling Maxime Ripard
2022-01-20 14:34 ` [PATCH v3 01/10] clk: Add Kunit tests for rate Maxime Ripard
2022-01-20 21:31 ` Stephen Boyd
2022-01-20 21:56 ` Daniel Latypov
2022-01-21 4:34 ` Stephen Boyd
2022-01-21 5:25 ` Daniel Latypov
2022-01-22 1:51 ` Stephen Boyd
2022-01-20 14:34 ` [PATCH v3 02/10] clk: Always clamp the rounded rate Maxime Ripard
2022-01-20 14:34 ` [PATCH v3 03/10] clk: Use clamp instead of open-coding our own Maxime Ripard
2022-01-20 14:34 ` [PATCH v3 04/10] clk: Always set the rate on clk_set_range_rate Maxime Ripard
2022-01-20 14:34 ` [PATCH v3 05/10] clk: Add clk_drop_range Maxime Ripard
2022-01-20 14:34 ` Maxime Ripard [this message]
2022-01-20 14:34 ` [PATCH v3 07/10] clk: bcm: rpi: Set a default minimum rate Maxime Ripard
2022-01-20 14:34 ` [PATCH v3 08/10] clk: bcm: rpi: Run some clocks at the minimum rate allowed Maxime Ripard
2022-01-20 14:34 ` [PATCH v3 09/10] drm/vc4: Add logging and comments Maxime Ripard
2022-01-20 14:34 ` [PATCH v3 10/10] drm/vc4: hdmi: Remove clock rate initialization Maxime Ripard
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