From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 854D0C433FE for ; Sat, 22 Jan 2022 09:20:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234278AbiAVJT7 (ORCPT ); Sat, 22 Jan 2022 04:19:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41100 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234111AbiAVJTO (ORCPT ); Sat, 22 Jan 2022 04:19:14 -0500 Received: from mail-pg1-x529.google.com (mail-pg1-x529.google.com [IPv6:2607:f8b0:4864:20::529]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8E4EAC061778 for ; Sat, 22 Jan 2022 01:18:40 -0800 (PST) Received: by mail-pg1-x529.google.com with SMTP id h23so10225370pgk.11 for ; Sat, 22 Jan 2022 01:18:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=eaTeWNEgjqwSs85dnefGHTIT7+UhSwDVAnPu0tdvvQE=; b=PRKpymQV7xWUkT5i0Ifjesb20aljfmowZM4+SjVfERsyMOTucgZNAUD9YO7ar8zJfr d1WarJMewlgGgzEyuoKB/jwrxIOHkjlYILVfH25V+Psn2PnnJ4re0cugZPIspYaWN82h YROLc5AQFk+7TBATAuWCjd8/uH4WAnKtYdXk4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=eaTeWNEgjqwSs85dnefGHTIT7+UhSwDVAnPu0tdvvQE=; b=4If3fWw0RLTPuw5cKQM8A1MKMemQ5pLDXvmhUg1lyAThdDrrEsIJ8QyTL4tIEsBV2A sgJQ5W7QGNhEt/NAZ9tU7xzTe39beCYT+QI7tCfvQZEhsHCr4WqlxyJUMAvA8lt46BjA 3m98w09HOyvEnF/BPz8cbu8HY7t9ZBQOJwz82kDtoDiqvSDxMojfylhE/VWmw9Fj6Myh z2ya/Yry5g/JKD3V9zStZtJavETDAC92I6fmqroMIU+zOyrE1xGHGm1LckdJ6K5O5cj2 knHCrfox9JpLZfFhSn6G23DZU4sEj9AQR1IMjRpzxuIu7Tzgemo82Q+MwxK9waONhnTY fuRQ== X-Gm-Message-State: AOAM532WVi1RokdR2/fnI4TPhvlgDus+vTDyew6u+E63x/4mJ3sUA4DK 1c3dHQoX/OveUjtd/DToy4usDg== X-Google-Smtp-Source: ABdhPJwRjgaufhTqOLp2a5KJoAsvUWYZrG3/EkFjCr5zSjeJlit/D9oY598PALMqVYEQeylLybPljA== X-Received: by 2002:a65:610b:: with SMTP id z11mr5646889pgu.205.1642843120168; Sat, 22 Jan 2022 01:18:40 -0800 (PST) Received: from wenstp920.tpe.corp.google.com ([2401:fa00:1:10:349f:9373:45d9:eb26]) by smtp.gmail.com with ESMTPSA id s1sm1608100pjn.42.2022.01.22.01.18.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jan 2022 01:18:39 -0800 (PST) From: Chen-Yu Tsai To: Stephen Boyd , Michael Turquette , Matthias Brugger Cc: Chen-Yu Tsai , Chun-Jie Chen , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 25/31] clk: mediatek: pll: Implement error handling in register API Date: Sat, 22 Jan 2022 17:17:25 +0800 Message-Id: <20220122091731.283592-26-wenst@chromium.org> X-Mailer: git-send-email 2.35.0.rc0.227.g00780c9af4-goog In-Reply-To: <20220122091731.283592-1-wenst@chromium.org> References: <20220122091731.283592-1-wenst@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The pll clk type registration function does not stop or return errors if any clk failed to be registered, nor does it implement an error handling path. This may result in a partially working device if any step failed. Make the register function return proper error codes, and bail out if errors occur. Proper cleanup, i.e. unregister any clks that were successfully registered, and unmap the I/O space, is done in the new error path. Signed-off-by: Chen-Yu Tsai --- drivers/clk/mediatek/clk-pll.c | 23 +++++++++++++++++++---- drivers/clk/mediatek/clk-pll.h | 6 +++--- 2 files changed, 22 insertions(+), 7 deletions(-) diff --git a/drivers/clk/mediatek/clk-pll.c b/drivers/clk/mediatek/clk-pll.c index 9698d1c97cd6..1dd15f560659 100644 --- a/drivers/clk/mediatek/clk-pll.c +++ b/drivers/clk/mediatek/clk-pll.c @@ -369,8 +369,9 @@ static void mtk_clk_unregister_pll(struct clk *clk) kfree(pll); } -void mtk_clk_register_plls(struct device_node *node, - const struct mtk_pll_data *plls, int num_plls, struct clk_onecell_data *clk_data) +int mtk_clk_register_plls(struct device_node *node, + const struct mtk_pll_data *plls, int num_plls, + struct clk_onecell_data *clk_data) { void __iomem *base; int i; @@ -379,7 +380,7 @@ void mtk_clk_register_plls(struct device_node *node, base = of_iomap(node, 0); if (!base) { pr_err("%s(): ioremap failed\n", __func__); - return; + return -EINVAL; } for (i = 0; i < num_plls; i++) { @@ -389,11 +390,25 @@ void mtk_clk_register_plls(struct device_node *node, if (IS_ERR(clk)) { pr_err("Failed to register clk %s: %pe\n", pll->name, clk); - continue; + goto err; } clk_data->clks[pll->id] = clk; } + + return 0; + +err: + while (--i >= 0) { + const struct mtk_pll_data *pll = &plls[i]; + + mtk_clk_unregister_pll(clk_data->clks[pll->id]); + clk_data->clks[pll->id] = ERR_PTR(-ENOENT); + }; + + iounmap(base); + + return PTR_ERR(clk); } EXPORT_SYMBOL_GPL(mtk_clk_register_plls); diff --git a/drivers/clk/mediatek/clk-pll.h b/drivers/clk/mediatek/clk-pll.h index a889b1e472e7..bf06e44caef9 100644 --- a/drivers/clk/mediatek/clk-pll.h +++ b/drivers/clk/mediatek/clk-pll.h @@ -48,9 +48,9 @@ struct mtk_pll_data { u8 pll_en_bit; /* Assume 0, indicates BIT(0) by default */ }; -void mtk_clk_register_plls(struct device_node *node, - const struct mtk_pll_data *plls, int num_plls, - struct clk_onecell_data *clk_data); +int mtk_clk_register_plls(struct device_node *node, + const struct mtk_pll_data *plls, int num_plls, + struct clk_onecell_data *clk_data); void mtk_clk_unregister_plls(const struct mtk_pll_data *plls, int num_plls, struct clk_onecell_data *clk_data); -- 2.35.0.rc0.227.g00780c9af4-goog