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From: Stephen Boyd <sboyd@kernel.org>
To: Ansuel Smith <ansuelsmth@gmail.com>
Cc: Andy Gross <agross@kernel.org>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Rob Herring <robh+dt@kernel.org>,
	Taniya Das <tdas@codeaurora.org>,
	devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 10/15] drivers: clk: qcom: gcc-ipq806x: add additional freq for sdc table
Date: Fri, 04 Feb 2022 19:03:54 -0800	[thread overview]
Message-ID: <20220205030355.CF26FC004E1@smtp.kernel.org> (raw)
In-Reply-To: <YfmtxA7fCmbBWK0Z@Ansuel-xps.localdomain>

Quoting Ansuel Smith (2022-02-01 14:01:40)
> On Tue, Jan 25, 2022 at 02:18:24PM -0800, Stephen Boyd wrote:
> > Quoting Ansuel Smith (2022-01-25 13:03:52)
> > > On Tue, Jan 25, 2022 at 12:45:53PM -0800, Stephen Boyd wrote:
> > > > Quoting Ansuel Smith (2022-01-21 13:03:35)
> > > > > Add additional freq supported for the sdc table.
> > > > > 
> > > > > Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
> > > > > ---
> > > > >  drivers/clk/qcom/gcc-ipq806x.c | 1 +
> > > > >  1 file changed, 1 insertion(+)
> > > > > 
> > > > > diff --git a/drivers/clk/qcom/gcc-ipq806x.c b/drivers/clk/qcom/gcc-ipq806x.c
> > > > > index 77bc3d94f580..dbd61e4844b0 100644
> > > > > --- a/drivers/clk/qcom/gcc-ipq806x.c
> > > > > +++ b/drivers/clk/qcom/gcc-ipq806x.c
> > > > > @@ -1292,6 +1292,7 @@ static const struct freq_tbl clk_tbl_sdc[] = {
> > > > >         {  20210000, P_PLL8,  1, 1,  19 },
> > > > >         {  24000000, P_PLL8,  4, 1,   4 },
> > > > >         {  48000000, P_PLL8,  4, 1,   2 },
> > > > > +       {  52000000, P_PLL8,  1, 2,  15 }, /* 51.2 Mhz */
> > > > 
> > > > Why the comment and fake rate? Can it be 51200000 instead and drop the
> > > > comment?
> > > 
> > > I will add the related reason in the commit.
> > > 
> > > We cannot achieve exact 52Mhz(jitter free) clock using PLL8.
> > > As per the MND calculator the closest possible jitter free clock
> > > using PLL8 is 51.2Mhz. This patch adds the values, which will provide
> > > jitter free 51.2Mhz when the requested frequency is 52mhz.
> > 
> > Sounds like this clk should use the round down clk_ops instead of the
> > round up ones. Then the actual frequency can be in the table.
> 
> Some hint on how to do that? This use the rcg generic ops that doesn't
> use any round. Should I crate some special ops in the rcg driver to
> implement the round ops?
> 

Use the clk_rcg2_floor_ops, or if this isn't an rcg2 clk, then make a
duplicate clk_rcg_floor_ops that does the same thing.

  reply	other threads:[~2022-02-05  3:03 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-21 21:03 [PATCH v3 00/15] Multiple addition and improvement to ipq8064 gcc Ansuel Smith
2022-01-21 21:03 ` [PATCH v3 01/15] dt-bindings: clock: split qcom,gcc.yaml to common and specific schema Ansuel Smith
2022-01-31 23:11   ` Bjorn Andersson
2022-02-01 21:53     ` Ansuel Smith
2022-01-21 21:03 ` [PATCH v3 02/15] dt-bindings: clock: simplify qcom,gcc-apq8064 Documentation Ansuel Smith
2022-01-21 21:03 ` [PATCH v3 03/15] dt-bindings: clock: Document qcom,gcc-ipq8064 binding Ansuel Smith
2022-01-21 21:03 ` [PATCH v3 04/15] drivers: clk: qcom: gcc-ipq806x: fix wrong naming for gcc_pxo_pll8_pll0 Ansuel Smith
2022-01-31 23:13   ` Bjorn Andersson
2022-01-21 21:03 ` [PATCH v3 05/15] drivers: clk: qcom: gcc-ipq806x: convert parent_names to parent_data Ansuel Smith
2022-01-21 21:03 ` [PATCH v3 06/15] drivers: clk: qcom: gcc-ipq806x: use ARRAY_SIZE for num_parents Ansuel Smith
2022-01-21 21:03 ` [PATCH v3 07/15] drivers: clk: qcom: gcc-ipq806x: drop hardcoded pxo and cxo source clk Ansuel Smith
2022-01-21 21:03 ` [PATCH v3 08/15] drivers: clk: qcom: gcc-ipq806x: add additional freq nss cores Ansuel Smith
2022-01-21 21:03 ` [PATCH v3 09/15] drivers: clk: qcom: gcc-ipq806x: add unusued flag for critical clock Ansuel Smith
2022-01-21 21:03 ` [PATCH v3 10/15] drivers: clk: qcom: gcc-ipq806x: add additional freq for sdc table Ansuel Smith
2022-01-25 20:45   ` Stephen Boyd
2022-01-25 21:03     ` Ansuel Smith
2022-01-25 22:18       ` Stephen Boyd
2022-02-01 22:01         ` Ansuel Smith
2022-02-05  3:03           ` Stephen Boyd [this message]
2022-01-21 21:03 ` [PATCH v3 11/15] dt-bindings: clock: add ipq8064 ce5 clk define Ansuel Smith
2022-01-25 20:47   ` Stephen Boyd
2022-01-25 21:02     ` Ansuel Smith
2022-01-21 21:03 ` [PATCH v3 12/15] drivers: clk: qcom: gcc-ipq806x: add CryptoEngine clocks Ansuel Smith
2022-01-21 21:03 ` [PATCH v3 13/15] dt-bindings: reset: add ipq8064 ce5 resets Ansuel Smith
2022-01-21 21:03 ` [PATCH v3 14/15] drivers: clk: qcom: gcc-ipq806x: add CryptoEngine resets Ansuel Smith
2022-01-21 21:03 ` [PATCH v3 15/15] ARM: dts: qcom: Add syscon and cxo/pxo clock to gcc node for ipq8064 Ansuel Smith

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