Re: [PATCH 5/8] dma: dw: Avoid partial transfers

Miquel Raynal
2022-02-21T13:12:38Z

Hi Andy,

phil.edworthy@renesas.com wrote on Mon, 21 Feb 2022 08:14:47 +0000:

> Hi Andy,
>
> I wrote the patch a few years ago, but didn't get the time to upstream it.
>
> I am not aware of a HW integration bug on the RZ/N1 device but can't rule it out. I am struggling to see what kind of HW issue this could be as, iirc, word accesses work fine when the size of the transfer is a multiple of the MEM width.
>
> I found the issue when testing DMA with the UART transferring different amounts of data.
>
> > > + if (sconfig->dst_addr_width && sconfig->dst_addr_width <
> > data_width)
> > > + data_width = sconfig->dst_addr_width;
> >
> > But here no check that you do it for explicitly peripheral to memory, so
> > this
> > will affect memory to peripheral transfers as well.
> No, this should be ok as this change is within:
> case DMA_DEV_TO_MEM:

I will add this to the commit log to clarify.

Thanks,
Miquèl