RE: [PATCH 5/8] dma: dw: Avoid partial transfers

Phil Edworthy
2022-02-23T07:45:19Z

Hi Andy,

> > I found the issue when testing DMA with the UART transferring different
> amounts of data.
>
> Can you tell more about the setup and test cases?
We had a loopback test from one uart to another. The test checks the
following transfer lengths (bytes):
1 to 33, 2043 to 2053, 4091 to 4101, 8187 to 8297, 16379 to 16389

I think 1 to 33 and 4095 to 4097 were enough to find the problem.

> Also, which version of the DW DMAC IP is being used in this SoC?
I'm still checking, but it looks to be 2.18b

Thanks
Phil