From: <conor.dooley@microchip.com>
To: <mturquette@baylibre.com>, <sboyd@kernel.org>,
<linux-clk@vger.kernel.org>, <robh+dt@kernel.org>,
<devicetree@vger.kernel.org>
Cc: <krzysztof.kozlowski@canonical.com>, <geert@linux-m68k.org>,
<david.abdurachmanov@gmail.com>, <palmer@dabbelt.com>,
<daire.mcnamara@microchip.com>, <cyril.jean@microchip.com>,
<conor.dooley@microchip.com>
Subject: [PATCH v11 0/1] Add clkcfg driver for Microchip PolarFire SoC
Date: Tue, 22 Feb 2022 08:27:06 +0000 [thread overview]
Message-ID: <20220222082706.3044572-1-conor.dooley@microchip.com> (raw)
From: Conor Dooley <conor.dooley@microchip.com>
This patch adds support for the clkcfg hardware block on the Microchip
PolarFire SoC
Change since v10:
* clks are not one based, don't use the CLK_DIVIDER_ONE_BASED flag
Changes since v9:
* removed devm_clk_get, replaced by index 0 clk_parent_data
* moved CLK_HW_INIT_x out of register functions
* dropped no longer needed name/flags/parent struct members
* added CLK_DIVIDER_ONE_BASED flags
* added rationale for critical clocks
* use lock directly
* dropped mpfs_periph_clk_recalc_rate
* dropped manual devm_ _unregisters
* dropped goto err in probe function
* dropped dt-binding (already in clk-next)
Changes since v8:
* Use devm_clk_hw_unregister directly
* Get parent clk in probe rather than register function
Changes since v7:
* Dropped clock-output-names again (oops)
Changes since v6:
* Dropped clock-output-names *as a required property*
* Dropped if(lock) check on spinlocks, added spinlocks to all
read-modify-write register access
* Removed kfree()s on non-dynamically allocated variables
* Use devm_clk_get to get the reference clock
* Account for reserved clock when calculating the size of num_clks
Changes since v5:
* Dropped clock-output-names property
Major changes since v4:
* Adjusted license for microchip,mpfs-clock.h to match microchip,mpfs.yaml
* Corrected the number of clocks to 33 from 32
Major changes since v3:
* Patch reformatted so microchip,mpfs-clock.h is part of device-tree patch
Major changes since v2:
* In mpfs_cfg_clk_set_rate, return immediately if divider_get_val
returns <0
* rebased to v5.12-rc1
Major changes since v1:
* Dependency on SOC_MICROCHIP_POLARFIRE
* All references to PFSOC/pfsoc changed to MPFS/mpfs
* Cleaned error handling in _probe
* Re-ordered code to place structs et al at top
Daire McNamara (1):
clk: microchip: Add driver for Microchip PolarFire SoC
drivers/clk/Kconfig | 4 +-
drivers/clk/Makefile | 2 +-
drivers/clk/microchip/Kconfig | 10 +
drivers/clk/microchip/Makefile | 1 +
drivers/clk/microchip/clk-mpfs.c | 381 +++++++++++++++++++++++++++++++
5 files changed, 394 insertions(+), 4 deletions(-)
create mode 100644 drivers/clk/microchip/Kconfig
create mode 100644 drivers/clk/microchip/clk-mpfs.c
--
2.35.1
next reply other threads:[~2022-02-22 8:24 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-22 8:27 conor.dooley [this message]
2022-02-22 8:27 ` [PATCH v11 1/1] clk: microchip: Add driver for Microchip PolarFire SoC conor.dooley
2022-02-22 11:47 ` Krzysztof Kozlowski
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