From: Miquel Raynal <miquel.raynal@bootlin.com>
To: linux-renesas-soc@vger.kernel.org,
Magnus Damm <magnus.damm@gmail.com>,
Gareth Williams <gareth.williams.jx@renesas.com>,
Phil Edworthy <phil.edworthy@renesas.com>,
Geert Uytterhoeven <geert@linux-m68k.org>,
Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
linux-clk@vger.kernel.org, Vinod Koul <vkoul@kernel.org>,
dmaengine@vger.kernel.org
Cc: Milan Stevanovic <milan.stevanovic@se.com>,
Jimmy Lalande <jimmy.lalande@se.com>,
Pascal Eberhard <pascal.eberhard@se.com>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Herve Codina <herve.codina@bootlin.com>,
Clement Leger <clement.leger@bootlin.com>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Viresh Kumar <vireshk@kernel.org>
Subject: Re: [PATCH v5 4/8] soc: renesas: rzn1-sysc: Export function to set dmamux
Date: Mon, 4 Apr 2022 14:55:18 +0200 [thread overview]
Message-ID: <20220404145518.6b427356@xps13> (raw)
In-Reply-To: <20220315191255.221473-5-miquel.raynal@bootlin.com>
Hello,
miquel.raynal@bootlin.com wrote on Tue, 15 Mar 2022 20:12:51 +0100:
> The dmamux register is located within the system controller.
>
> Without syscon, we need an extra helper in order to give write access to
> this register to a dmamux driver.
>
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> ---
> drivers/clk/renesas/r9a06g032-clocks.c | 35 ++++++++++++++++++-
> include/linux/soc/renesas/r9a06g032-sysctrl.h | 11 ++++++
> 2 files changed, 45 insertions(+), 1 deletion(-)
> create mode 100644 include/linux/soc/renesas/r9a06g032-sysctrl.h
>
[...]
> /* register/bit pairs are encoded as an uint16_t */
> static void
> clk_rdesc_set(struct r9a06g032_priv *clocks,
> @@ -922,6 +948,7 @@ static int __init r9a06g032_clocks_probe(struct platform_device *pdev)
> clocks->reg = of_iomap(np, 0);
> if (WARN_ON(!clocks->reg))
> return -ENOMEM;
> +
As we are post -rc1 I will repost this series as a v6 after rebasing.
While at it I'll get rid of this extra new line but that's basically
all what I plan to change.
As this series brings the basics for more RZN1 support (because of
this specific sysctrl patch), it is kind of a base for more
contributions which are in the pipe (UART, USB, RTC, Switch, etc) so
hopefully it is now ready to be accepted.
Thanks,
Miquèl
next prev parent reply other threads:[~2022-04-04 12:55 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-15 19:12 [PATCH v5 0/8] RZN1 DMA support Miquel Raynal
2022-03-15 19:12 ` [PATCH v5 1/8] dt-bindings: dmaengine: Introduce RZN1 dmamux bindings Miquel Raynal
2022-03-15 19:12 ` [PATCH v5 2/8] dt-bindings: clock: r9a06g032-sysctrl: Reference the DMAMUX subnode Miquel Raynal
2022-03-15 22:27 ` Stephen Boyd
2022-03-15 19:12 ` [PATCH v5 3/8] dt-bindings: dmaengine: Introduce RZN1 DMA compatible Miquel Raynal
2022-03-15 19:12 ` [PATCH v5 4/8] soc: renesas: rzn1-sysc: Export function to set dmamux Miquel Raynal
2022-03-15 22:28 ` Stephen Boyd
2022-04-04 12:55 ` Miquel Raynal [this message]
2022-03-15 19:12 ` [PATCH v5 5/8] dmaengine: dw: dmamux: Introduce RZN1 DMA router support Miquel Raynal
2022-03-15 22:28 ` Stephen Boyd
2022-03-15 19:12 ` [PATCH v5 6/8] dmaengine: dw: Add RZN1 compatible Miquel Raynal
2022-03-15 19:12 ` [PATCH v5 7/8] ARM: dts: r9a06g032: Add the two DMA nodes Miquel Raynal
2022-03-15 19:12 ` [PATCH v5 8/8] ARM: dts: r9a06g032: Describe the DMA router Miquel Raynal
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