From: Rex-BC Chen <rex-bc.chen@mediatek.com>
To: <mturquette@baylibre.com>, <sboyd@kernel.org>,
<matthias.bgg@gmail.com>, <robh+dt@kernel.org>,
<krzysztof.kozlowski+dt@linaro.org>
Cc: <p.zabel@pengutronix.de>,
<angelogioacchino.delregno@collabora.com>,
<chun-jie.chen@mediatek.com>, <wenst@chromium.org>,
<runyang.chen@mediatek.com>, <linux-kernel@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-clk@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<Project_Global_Chrome_Upstream_Group@mediatek.com>,
Rex-BC Chen <rex-bc.chen@mediatek.com>
Subject: [PATCH v6 13/16] dt-bindings: reset: mediatek: Add infra_ao reset index for MT8192/MT8195
Date: Tue, 3 May 2022 17:38:53 +0800 [thread overview]
Message-ID: <20220503093856.22250-14-rex-bc.chen@mediatek.com> (raw)
In-Reply-To: <20220503093856.22250-1-rex-bc.chen@mediatek.com>
To support reset of infra_ao, add the index of infra_ao reset of
thermal/svs/pcei for MT8192 and thermal/svs for MT8195.
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
---
include/dt-bindings/reset/mt8192-resets.h | 8 ++++++++
include/dt-bindings/reset/mt8195-resets.h | 6 ++++++
2 files changed, 14 insertions(+)
diff --git a/include/dt-bindings/reset/mt8192-resets.h b/include/dt-bindings/reset/mt8192-resets.h
index be9a7ca245b9..1779ff6a832e 100644
--- a/include/dt-bindings/reset/mt8192-resets.h
+++ b/include/dt-bindings/reset/mt8192-resets.h
@@ -7,6 +7,7 @@
#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT8192
#define _DT_BINDINGS_RESET_CONTROLLER_MT8192
+/* TOPRGU resets */
#define MT8192_TOPRGU_MM_SW_RST 1
#define MT8192_TOPRGU_MFG_SW_RST 2
#define MT8192_TOPRGU_VENC_SW_RST 3
@@ -27,4 +28,11 @@
#define MT8192_TOPRGU_SW_RST_NUM 23
+/* INFRA resets */
+#define MT8192_INFRA_RST0_THERM_CTRL_SWRST 0
+#define MT8192_INFRA_RST2_PEXTP_PHY_SWRST 1
+#define MT8192_INFRA_RST3_THERM_CTRL_PTP_SWRST 2
+#define MT8192_INFRA_RST4_PCIE_TOP_SWRST 3
+#define MT8192_INFRA_RST4_THERM_CTRL_MCU_SWRST 4
+
#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8192 */
diff --git a/include/dt-bindings/reset/mt8195-resets.h b/include/dt-bindings/reset/mt8195-resets.h
index a26bccc8b957..0b1937f14b36 100644
--- a/include/dt-bindings/reset/mt8195-resets.h
+++ b/include/dt-bindings/reset/mt8195-resets.h
@@ -7,6 +7,7 @@
#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT8195
#define _DT_BINDINGS_RESET_CONTROLLER_MT8195
+/* TOPRGU resets */
#define MT8195_TOPRGU_CONN_MCU_SW_RST 0
#define MT8195_TOPRGU_INFRA_GRST_SW_RST 1
#define MT8195_TOPRGU_APU_SW_RST 2
@@ -26,4 +27,9 @@
#define MT8195_TOPRGU_SW_RST_NUM 16
+/* INFRA resets */
+#define MT8195_INFRA_RST0_THERM_CTRL_SWRST 0
+#define MT8195_INFRA_RST3_THERM_CTRL_PTP_SWRST 1
+#define MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST 2
+
#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8195 */
--
2.18.0
next prev parent reply other threads:[~2022-05-03 9:39 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-03 9:38 [PATCH v6 00/16] Cleanup MediaTek clk reset drivers and support MT8192/MT8195 Rex-BC Chen
2022-05-03 9:38 ` [PATCH v6 01/16] clk: mediatek: reset: Add reset.h Rex-BC Chen
2022-05-03 9:38 ` [PATCH v6 02/16] clk: mediatek: reset: Fix written reset bit offset Rex-BC Chen
2022-05-03 9:38 ` [PATCH v6 03/16] clk: mediatek: reset: Refine and reorder functions in reset.c Rex-BC Chen
2022-05-03 9:38 ` [PATCH v6 04/16] clk: mediatek: reset: Extract common drivers to update function Rex-BC Chen
2022-05-03 9:38 ` [PATCH v6 05/16] clk: mediatek: reset: Merge and revise reset register function Rex-BC Chen
2022-05-03 9:38 ` [PATCH v6 06/16] clk: mediatek: reset: Revise structure to control reset register Rex-BC Chen
2022-05-03 9:38 ` [PATCH v6 07/16] clk: mediatek: reset: Support nonsequence base offsets of reset registers Rex-BC Chen
2022-05-03 9:38 ` [PATCH v6 08/16] clk: mediatek: reset: Support inuput argument index mode Rex-BC Chen
2022-05-03 12:37 ` AngeloGioacchino Del Regno
2022-05-03 9:38 ` [PATCH v6 09/16] clk: mediatek: reset: Change return type for clock reset register function Rex-BC Chen
2022-05-03 9:38 ` [PATCH v6 10/16] clk: mediatek: reset: Add new register reset function with device Rex-BC Chen
2022-05-03 9:38 ` [PATCH v6 11/16] clk: mediatek: reset: Add reset support for simple probe Rex-BC Chen
2022-05-03 9:38 ` [PATCH v6 12/16] dt-bindings: arm: mediatek: Add #reset-cells property for MT8192/MT8195 Rex-BC Chen
2022-05-03 12:37 ` AngeloGioacchino Del Regno
2022-05-03 9:38 ` Rex-BC Chen [this message]
2022-05-03 12:27 ` [PATCH v6 13/16] dt-bindings: reset: mediatek: Add infra_ao reset index " Krzysztof Kozlowski
2022-05-03 12:37 ` AngeloGioacchino Del Regno
2022-05-03 9:38 ` [PATCH v6 14/16] clk: mediatek: reset: Add infra_ao reset support " Rex-BC Chen
2022-05-03 9:38 ` [PATCH v6 15/16] arm64: dts: mediatek: Add infra #reset-cells property for MT8192 Rex-BC Chen
2022-06-22 11:05 ` Matthias Brugger
2022-05-03 9:38 ` [PATCH v6 16/16] arm64: dts: mediatek: Add infra #reset-cells property for MT8195 Rex-BC Chen
2022-06-22 11:08 ` Matthias Brugger
2022-06-22 12:06 ` Rex-BC Chen
2022-05-09 5:35 ` [PATCH v6 00/16] Cleanup MediaTek clk reset drivers and support MT8192/MT8195 Rex-BC Chen
[not found] ` <20220517072329.D367AC385B8@smtp.kernel.org>
2022-05-17 10:30 ` Rex-BC Chen
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220503093856.22250-14-rex-bc.chen@mediatek.com \
--to=rex-bc.chen@mediatek.com \
--cc=Project_Global_Chrome_Upstream_Group@mediatek.com \
--cc=angelogioacchino.delregno@collabora.com \
--cc=chun-jie.chen@mediatek.com \
--cc=devicetree@vger.kernel.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mediatek@lists.infradead.org \
--cc=matthias.bgg@gmail.com \
--cc=mturquette@baylibre.com \
--cc=p.zabel@pengutronix.de \
--cc=robh+dt@kernel.org \
--cc=runyang.chen@mediatek.com \
--cc=sboyd@kernel.org \
--cc=wenst@chromium.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox