Re: [PATCH v2 01/11] clk: divider: Introduce devm_clk_hw_register_divider_parent_hw()

Dmitry Baryshkov
2022-06-02T10:15:11Z

On Thu, 2 Jun 2022 at 01:07, Marijn Suijten
<marijn.suijten@somainline.org> wrote:
>
> Add the devres variant of clk_hw_register_divider_parent_hw() for
> registering a divider clock with clk_hw parent pointer instead of parent
> name.
>
> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

> ---
> include/linux/clk-provider.h | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
> index c10dc4c659e2..4e07621849e6 100644
> --- a/include/linux/clk-provider.h
> +++ b/include/linux/clk-provider.h
> @@ -831,6 +831,25 @@ struct clk *clk_register_divider_table(struct device *dev, const char *name,
> __devm_clk_hw_register_divider((dev), NULL, (name), (parent_name), NULL, \
> NULL, (flags), (reg), (shift), (width), \
> (clk_divider_flags), NULL, (lock))
> +/**
> + * devm_clk_hw_register_divider_parent_hw - register a divider clock with the clock framework
> + * @dev: device registering this clock
> + * @name: name of this clock
> + * @parent_hw: pointer to parent clk
> + * @flags: framework-specific flags
> + * @reg: register address to adjust divider
> + * @shift: number of bits to shift the bitfield
> + * @width: width of the bitfield
> + * @clk_divider_flags: divider-specific flags for this clock
> + * @lock: shared register lock for this clock
> + */
> +#define devm_clk_hw_register_divider_parent_hw(dev, name, parent_hw, flags, \
> + reg, shift, width, \
> + clk_divider_flags, lock) \
> + __devm_clk_hw_register_divider((dev), NULL, (name), NULL, \
> + (parent_hw), NULL, (flags), (reg), \
> + (shift), (width), (clk_divider_flags), \
> + NULL, (lock))
> /**
> * devm_clk_hw_register_divider_table - register a table based divider clock
> * with the clock framework (devres variant)
> --
> 2.36.1
>

--
With best wishes
Dmitry