Re: [PATCH v6 7/7] clk: qcom: add camera clock controller driver for SM8450 SoC

[Stephen Boyd <sboyd@kernel.org>]

Quoting Vladimir Zapolskiy (2022-06-03 01:01:05)
> diff --git a/drivers/clk/qcom/camcc-sm8450.c b/drivers/clk/qcom/camcc-sm8450.c
> new file mode 100644
> index 000000000000..f213c33647e2
> --- /dev/null
> +++ b/drivers/clk/qcom/camcc-sm8450.c
> @@ -0,0 +1,2866 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
> + */
> +
> +#include <linux/clk.h>

Is this include used?

> +#include <linux/clk-provider.h>
> +#include <linux/module.h>
> +#include <linux/of_device.h>

Include mod_devicetable.h instead?

> +#include <linux/of.h>

Is this include used?

> +#include <linux/regmap.h>
> +
> +#include <dt-bindings/clock/qcom,sm8450-camcc.h>
> +
> +#include "clk-alpha-pll.h"
> +#include "clk-branch.h"
> +#include "clk-pll.h"
> +#include "clk-rcg.h"
> +#include "clk-regmap.h"
> +#include "clk-regmap-divider.h"
> +#include "clk-regmap-mux.h"
> +#include "common.h"
> +#include "gdsc.h"
> +#include "reset.h"
> +
> +enum {
> +       P_BI_TCXO,
> +       P_CAM_CC_PLL0_OUT_EVEN,
> +       P_CAM_CC_PLL0_OUT_MAIN,
> +       P_CAM_CC_PLL0_OUT_ODD,
> +       P_CAM_CC_PLL1_OUT_EVEN,
> +       P_CAM_CC_PLL2_OUT_EVEN,
> +       P_CAM_CC_PLL2_OUT_MAIN,
> +       P_CAM_CC_PLL3_OUT_EVEN,
> +       P_CAM_CC_PLL4_OUT_EVEN,
> +       P_CAM_CC_PLL5_OUT_EVEN,
> +       P_CAM_CC_PLL6_OUT_EVEN,
> +       P_CAM_CC_PLL7_OUT_EVEN,
> +       P_CAM_CC_PLL8_OUT_EVEN,
> +       P_SLEEP_CLK,
> +};
> +
> +static const struct pll_vco lucid_evo_vco[] = {
> +       { 249600000, 2000000000, 0 },
> +};
> +
> +static const struct pll_vco rivian_evo_vco[] = {
> +       { 864000000, 1056000000, 0 },
> +};
> +
> +static const struct alpha_pll_config cam_cc_pll0_config = {
> +       .l = 0x3e,
> +       .alpha = 0x8000,
> +       .config_ctl_val = 0x20485699,
> +       .config_ctl_hi_val = 0x00182261,
> +       .config_ctl_hi1_val = 0x32aa299c,
> +       .user_ctl_val = 0x00008400,
> +       .user_ctl_hi_val = 0x00000805,
> +};
> +
> +static struct clk_alpha_pll cam_cc_pll0 = {
> +       .offset = 0x0,
> +       .vco_table = lucid_evo_vco,
> +       .num_vco = ARRAY_SIZE(lucid_evo_vco),
> +       .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_LUCID_EVO],
> +       .clkr = {
> +               .hw.init = &(struct clk_init_data){

Make these anonymous structs const please.

> +                       .name = "cam_cc_pll0",
> +                       .parent_data = &(const struct clk_parent_data){