From: Sergiu Moga <sergiu.moga@microchip.com>
To: <lee@kernel.org>, <robh+dt@kernel.org>,
<krzysztof.kozlowski+dt@linaro.org>,
<nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>,
<claudiu.beznea@microchip.com>, <radu_nicolae.pirea@upb.ro>,
<richard.genoud@gmail.com>, <gregkh@linuxfoundation.org>,
<broonie@kernel.org>, <mturquette@baylibre.com>,
<sboyd@kernel.org>, <jirislaby@kernel.org>,
<sergiu.moga@microchip.com>, <admin@hifiphile.com>,
<kavyasree.kotagiri@microchip.com>, <tudor.ambarus@microchip.com>
Cc: <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <linux-spi@vger.kernel.org>,
<linux-serial@vger.kernel.org>, <linux-clk@vger.kernel.org>
Subject: [PATCH v3 10/14] tty: serial: atmel: Define GCLK as USART baudrate source clock
Date: Tue, 13 Sep 2022 17:22:02 +0300 [thread overview]
Message-ID: <20220913142205.162399-11-sergiu.moga@microchip.com> (raw)
In-Reply-To: <20220913142205.162399-1-sergiu.moga@microchip.com>
Define the bit that represents the choice of having GCLK as a baudrate
source clock inside the USCLKS bitmask of the Mode Register of
USART IP's.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
---
v1 -> v2:
- Nothing, this patch was not here before
v2 -> v3:
- Nothing
drivers/tty/serial/atmel_serial.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/tty/serial/atmel_serial.h b/drivers/tty/serial/atmel_serial.h
index 0d8a0f9cc5c3..70d0611e56fd 100644
--- a/drivers/tty/serial/atmel_serial.h
+++ b/drivers/tty/serial/atmel_serial.h
@@ -49,6 +49,7 @@
#define ATMEL_US_USCLKS GENMASK(5, 4) /* Clock Selection */
#define ATMEL_US_USCLKS_MCK (0 << 4)
#define ATMEL_US_USCLKS_MCK_DIV8 (1 << 4)
+#define ATMEL_US_USCLKS_GCLK (2 << 4)
#define ATMEL_US_USCLKS_SCK (3 << 4)
#define ATMEL_US_CHRL GENMASK(7, 6) /* Character Length */
#define ATMEL_US_CHRL_5 (0 << 6)
--
2.34.1
next prev parent reply other threads:[~2022-09-13 15:55 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-13 14:21 [PATCH v3 00/14] Make atmel serial driver aware of GCLK Sergiu Moga
2022-09-13 14:21 ` [PATCH v3 01/14] ARM: dts: at91: sama7g5: Swap rx and tx for spi11 Sergiu Moga
2022-09-16 8:13 ` Claudiu.Beznea
2022-09-13 14:21 ` [PATCH v3 02/14] ARM: dts: at91: sam9x60ek: Add DBGU compatibles to uart1 Sergiu Moga
2022-09-16 8:14 ` Claudiu.Beznea
2022-09-13 14:21 ` [PATCH v3 03/14] ARM: dts: at91: Add `atmel,usart-mode` required property to serial nodes Sergiu Moga
2022-09-16 8:15 ` Claudiu.Beznea
2022-09-13 14:21 ` [PATCH v3 04/14] spi: dt-bindings: atmel,at91rm9200-spi: Add DMA related properties Sergiu Moga
2022-09-16 8:15 ` Claudiu.Beznea
2022-09-13 14:21 ` [PATCH v3 05/14] dt-bindings: mfd: atmel,sama5d2-flexcom: Add SPI child node ref binding Sergiu Moga
2022-09-13 14:21 ` [PATCH v3 06/14] dt-bindings: serial: atmel,at91-usart: convert to json-schema Sergiu Moga
2022-09-13 14:28 ` Krzysztof Kozlowski
2022-09-13 14:21 ` [PATCH v3 07/14] dt-bindings: serial: atmel,at91-usart: Add SAM9260 compatibles to SAM9X60 Sergiu Moga
2022-09-13 14:28 ` Krzysztof Kozlowski
2022-09-13 14:22 ` [PATCH v3 08/14] dt-bindings: mfd: atmel,sama5d2-flexcom: Add USART child node ref binding Sergiu Moga
2022-09-13 14:29 ` Krzysztof Kozlowski
2022-09-13 14:22 ` [PATCH v3 09/14] dt-bindings: serial: atmel,at91-usart: Add gclk as a possible USART clock Sergiu Moga
2022-09-13 14:29 ` Krzysztof Kozlowski
2022-09-13 14:22 ` Sergiu Moga [this message]
2022-09-13 14:22 ` [PATCH v3 11/14] tty: serial: atmel: Define BRSRCCK bitmask of UART IP's Mode Register Sergiu Moga
2022-09-13 14:22 ` [PATCH v3 12/14] tty: serial: atmel: Only divide Clock Divisor if the IP is USART Sergiu Moga
2022-09-14 11:01 ` Ilpo Järvinen
2022-09-14 12:17 ` Sergiu.Moga
2022-09-13 14:22 ` [PATCH v3 13/14] clk: at91: sama5d2: Add Generic Clocks for UART/USART Sergiu Moga
2022-09-16 8:16 ` Claudiu.Beznea
2022-09-13 14:22 ` [PATCH v3 14/14] tty: serial: atmel: Make the driver aware of the existence of GCLK Sergiu Moga
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