[PATCH v2 00/11] Add new partial clock and reset drivers for StarFive JH7110

Xingyu Wu
2023-02-21T08:33:46Z

This patch serises are to add new partial clock drivers and reset
supports about System-Top-Group(STG), Image-Signal-Process(ISP)
and Video-Output(VOUT) for the StarFive JH7110 RISC-V SoC.

Patches 1 to 3 are about the System-Top-Group clock and reset
generator(STGCRG) part.
The first patch adds docunmentation to describe STG bindings, and
the second patch adds support about STG resets. The last patch adds
clock driver to support STG clocks for JH7110.

Patches 4 to 6 are about the Image-Signal-Process clock and reset
gennerator(ISPCRG) part.
The first patch adds docunmentation to describe ISP bindings, and
the second patch adds support about ISP resets. The last patch adds
clock driver to support ISP clocks for JH7110.

Patches 7 to 9 are about the Video-Output clock and reset
generator(VOUTCRG) part.
The first patch adds docunmentation to describe VOUT bindings, and
the second patch adds support about VOUT resets. The last patch adds
clock driver to support VOUT clocks for JH7110.

Patch 10 adds external clocks which ISP and VOUT clock driver need.
Patch 11 adds device node about STGCRG, ISPCRG and VOUTCRG to JH7110 dts.

Patches 2, 3, 5, 6, 8 and 9 are dependent on the patchset [1] which
is about JH71x0 clock and reset driver.
Patches 6 and 9 also are dependent on the patchset [2] which is about
JH7110 PMU driver(Accpeted).
Patchdes 10 and 11 are dependent on the patchset [1] and [3] which is
about JH7110 device tree and PMU node.
This patchset should be applied after the patchset [1], [2], [3]:
[1] https://lore.kernel.org/all/20230221024645.127922-1-hal.feng@starfivetech.com/
[2] https://lore.kernel.org/all/20230119094447.21939-3-walker.chen@starfivetech.com/
[3] https://lore.kernel.org/all/20230116074259.22874-4-walker.chen@starfivetech.com/

Changes since v1:
- Modified the binding and dropped the indentation.
- Removed the useless header files in the drivers.
- Used an array lookup instead of a pile of conditions about parent
clocks' name.
- Added clocks operation on driver remove.

v1: https://lore.kernel.org/all/20230120024445.244345-1-xingyu.wu@starfivetech.com/

Xingyu Wu (11):
dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and
reset generator
reset: starfive: jh7110: Add StarFive System-Top-Group reset support
clk: starfive: Add StarFive JH7110 System-Top-Group clock driver
dt-bindings: clock: Add StarFive JH7110 Image-Signal-Process clock and
reset generator
reset: starfive: jh7110: Add StarFive Image-Signal-Process reset
support
clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driver
dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset
generator
reset: starfive: jh7110: Add StarFive Video-Output reset support
clk: starfive: Add StarFive JH7110 Video-Output clock driver
riscv: dts: starfive: jh7110: Add DVP and HDMI TX pixel external
clocks
riscv: dts: starfive: jh7110: Add STGCRG/ISPCRG/VOUTCRG nodes

.../clock/starfive,jh7110-ispcrg.yaml | 97 +++++++
.../clock/starfive,jh7110-stgcrg.yaml | 82 ++++++
.../clock/starfive,jh7110-voutcrg.yaml | 96 +++++++
MAINTAINERS | 1 +
.../jh7110-starfive-visionfive-2.dtsi | 8 +
arch/riscv/boot/dts/starfive/jh7110.dtsi | 71 +++++
drivers/clk/starfive/Kconfig | 33 +++
drivers/clk/starfive/Makefile | 3 +
.../clk/starfive/clk-starfive-jh7110-isp.c | 254 +++++++++++++++++
.../clk/starfive/clk-starfive-jh7110-stg.c | 176 ++++++++++++
.../clk/starfive/clk-starfive-jh7110-vout.c | 261 ++++++++++++++++++
.../reset/starfive/reset-starfive-jh7110.c | 30 ++
.../dt-bindings/clock/starfive,jh7110-crg.h | 74 +++++
.../dt-bindings/reset/starfive,jh7110-crg.h | 60 ++++
14 files changed, 1246 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh7110-ispcrg.yaml
create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh7110-stgcrg.yaml
create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh7110-voutcrg.yaml
create mode 100644 drivers/clk/starfive/clk-starfive-jh7110-isp.c
create mode 100644 drivers/clk/starfive/clk-starfive-jh7110-stg.c
create mode 100644 drivers/clk/starfive/clk-starfive-jh7110-vout.c

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2.25.1