From: Elaine Zhang <zhangqing@rock-chips.com>
To: mturquette@baylibre.com, sboyd@kernel.org,
kever.yang@rock-chips.com, zhangqing@rock-chips.com,
heiko@sntech.de, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-clk@vger.kernel.org, linux-rockchip@lists.infradead.org,
linux-kernel@vger.kernel.org, huangtao@rock-chips.com,
andy.yan@rock-chips.com
Subject: [PATCH v5 1/4] clk: gate: export clk_gate_endisable
Date: Wed, 8 Nov 2023 14:18:19 +0800 [thread overview]
Message-ID: <20231108061822.4871-2-zhangqing@rock-chips.com> (raw)
In-Reply-To: <20231108061822.4871-1-zhangqing@rock-chips.com>
make clk_gate_endisable not static, export API for other use.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
drivers/clk/clk-gate.c | 3 ++-
include/linux/clk-provider.h | 1 +
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c
index 68e585a02fd9..531bb84a5b3e 100644
--- a/drivers/clk/clk-gate.c
+++ b/drivers/clk/clk-gate.c
@@ -53,7 +53,7 @@ static inline void clk_gate_writel(struct clk_gate *gate, u32 val)
*
* So, result is always: enable xor set2dis.
*/
-static void clk_gate_endisable(struct clk_hw *hw, int enable)
+void clk_gate_endisable(struct clk_hw *hw, int enable)
{
struct clk_gate *gate = to_clk_gate(hw);
int set = gate->flags & CLK_GATE_SET_TO_DISABLE ? 1 : 0;
@@ -87,6 +87,7 @@ static void clk_gate_endisable(struct clk_hw *hw, int enable)
else
__release(gate->lock);
}
+EXPORT_SYMBOL_GPL(clk_gate_endisable);
static int clk_gate_enable(struct clk_hw *hw)
{
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index ace3a4ce2fc9..76b050d73feb 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -630,6 +630,7 @@ struct clk *clk_register_gate(struct device *dev, const char *name,
void clk_unregister_gate(struct clk *clk);
void clk_hw_unregister_gate(struct clk_hw *hw);
int clk_gate_is_enabled(struct clk_hw *hw);
+void clk_gate_endisable(struct clk_hw *hw, int enable);
struct clk_div_table {
unsigned int val;
--
2.17.1
next prev parent reply other threads:[~2023-11-08 6:28 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-08 6:18 [PATCH v5 0/4] rockchip: add GATE_LINK Elaine Zhang
2023-11-08 6:18 ` Elaine Zhang [this message]
2023-11-08 6:18 ` [PATCH v5 2/4] clk: rockchip: add support for gate link Elaine Zhang
2023-11-08 6:18 ` [PATCH v5 3/4] dt-bindings: clock: rk3588: export PCLK_VO1GRF clk id Elaine Zhang
2023-11-08 12:01 ` Conor Dooley
2023-11-08 12:12 ` Krzysztof Kozlowski
2023-11-09 6:27 ` zhangqing
2023-11-09 7:29 ` Conor Dooley
2023-11-09 8:06 ` zhangqing
2023-11-09 9:21 ` Krzysztof Kozlowski
2023-11-09 10:05 ` zhangqing
2023-11-09 10:24 ` Krzysztof Kozlowski
2023-11-10 1:23 ` zhangqing
2023-11-10 18:07 ` Conor Dooley
2023-11-08 6:18 ` [PATCH v5 4/4] clk: rockchip: rk3588: Adjust the GATE_LINK parameter Elaine Zhang
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