[GIT PULL] clk fixes for v6.7-rc5

[Stephen Boyd <sboyd@kernel.org>]

The following changes since commit b85ea95d086471afb4ad062012a4d73cd328fa86:

  Linux 6.7-rc1 (2023-11-12 16:19:07 -0800)

are available in the Git repository at:

  https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git tags/clk-fixes-for-linus

for you to fetch changes up to 8defec031c40913ef10d2f654a5ccc8a2a9730c1:

  Merge tag 'v6.7-rockchip-clkfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-fixes (2023-12-13 15:26:24 -0800)

----------------------------------------------------------------
A handful of clk fixes, mostly in the rockchip clk driver

 - Fix a clk name, clk parent, and a register for a clk gate in the
   Rockchip rk3128 clk driver
 - Add a PLL frequency on Rockchip rk3568 to fix some display artifacts
 - Fix a kbuild dependency for Qualcomm's SM_CAMCC_8550 symbol so that
   it isn't possible to select the associated GCC driver

----------------------------------------------------------------
Alex Bee (1):
      clk: rockchip: rk3128: Fix SCLK_SDMMC's clock name

Chris Morgan (1):
      clk: rockchip: rk3568: Add PLL rate for 292.5MHz

Finley Xiao (1):
      clk: rockchip: rk3128: Fix aclk_peri_src's parent

Jagadeesh Kona (1):
      clk: qcom: Fix SM_CAMCC_8550 dependencies

Stephen Boyd (1):
      Merge tag 'v6.7-rockchip-clkfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-fixes

Weihao Li (1):
      clk: rockchip: rk3128: Fix HCLK_OTG gate register

 drivers/clk/qcom/Kconfig          |  1 +
 drivers/clk/rockchip/clk-rk3128.c | 24 +++++++++---------------
 drivers/clk/rockchip/clk-rk3568.c |  1 +
 3 files changed, 11 insertions(+), 15 deletions(-)

-- 
https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git/
https://git.kernel.org/pub/scm/linux/kernel/git/sboyd/spmi.git