Linux clock framework development
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From: Devi Priya <quic_devipriy@quicinc.com>
To: <andersson@kernel.org>, <konrad.dybcio@linaro.org>,
	<mturquette@baylibre.com>, <sboyd@kernel.org>,
	<robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
	<conor+dt@kernel.org>, <catalin.marinas@arm.com>,
	<will@kernel.org>, <p.zabel@pengutronix.de>,
	<richardcochran@gmail.com>, <geert+renesas@glider.be>,
	<arnd@arndb.de>, <neil.armstrong@linaro.org>,
	<nfraprado@collabora.com>, <m.szyprowski@samsung.com>
Cc: <linux-arm-msm@vger.kernel.org>, <linux-clk@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>, <netdev@vger.kernel.org>,
	<quic_devipriy@quicinc.com>
Subject: [PATCH V3 6/7] arm64: dts: qcom: ipq9574: Add support for nsscc node
Date: Mon, 29 Jan 2024 10:41:03 +0530	[thread overview]
Message-ID: <20240129051104.1855487-7-quic_devipriy@quicinc.com> (raw)
In-Reply-To: <20240129051104.1855487-1-quic_devipriy@quicinc.com>

Add a node for the nss clock controller found on ipq9574 based devices.

Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
---
 Changes in V3:
	- Dropped clock-names & moved xo clock to the start of the list

 arch/arm64/boot/dts/qcom/ipq9574.dtsi | 39 +++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
index 5f83ee42a719..20e51a5c7a87 100644
--- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
@@ -10,6 +10,8 @@
 #include <dt-bindings/clock/qcom,ipq9574-gcc.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/reset/qcom,ipq9574-gcc.h>
+#include <dt-bindings/clock/qcom,ipq9574-nsscc.h>
+#include <dt-bindings/reset/qcom,ipq9574-nsscc.h>
 #include <dt-bindings/thermal/thermal.h>
 
 / {
@@ -18,6 +20,24 @@ / {
 	#size-cells = <2>;
 
 	clocks {
+		bias_pll_cc_clk: bias-pll-cc-clk {
+			compatible = "fixed-clock";
+			clock-frequency = <1200000000>;
+			#clock-cells = <0>;
+		};
+
+		bias_pll_nss_noc_clk: bias-pll-nss-noc-clk {
+			compatible = "fixed-clock";
+			clock-frequency = <461500000>;
+			#clock-cells = <0>;
+		};
+
+		bias_pll_ubi_nc_clk: bias-pll-ubi-nc-clk {
+			compatible = "fixed-clock";
+			clock-frequency = <353000000>;
+			#clock-cells = <0>;
+		};
+
 		sleep_clk: sleep-clk {
 			compatible = "fixed-clock";
 			#clock-cells = <0>;
@@ -741,6 +761,25 @@ frame@b128000 {
 				status = "disabled";
 			};
 		};
+
+		nsscc: clock-controller@39b00000 {
+			compatible = "qcom,ipq9574-nsscc";
+			reg = <0x39b00000 0x80000>;
+			clocks = <&xo_board_clk>,
+				 <&bias_pll_cc_clk>,
+				 <&bias_pll_nss_noc_clk>,
+				 <&bias_pll_ubi_nc_clk>,
+				 <&gcc GPLL0_OUT_AUX>,
+				 <0>,
+				 <0>,
+				 <0>,
+				 <0>,
+				 <0>,
+				 <0>;
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+			#power-domain-cells = <1>;
+		};
 	};
 
 	thermal-zones {
-- 
2.34.1


  parent reply	other threads:[~2024-01-29  5:12 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-29  5:10 [PATCH V3 0/7] Add NSS clock controller support for IPQ9574 Devi Priya
2024-01-29  5:10 ` [PATCH V3 1/7] clk: qcom: clk-alpha-pll: Add NSS HUAYRA ALPHA PLL support for ipq9574 Devi Priya
2024-01-29  5:10 ` [PATCH V3 2/7] dt-bindings: clock: gcc-ipq9574: Add definition for GPLL0_OUT_AUX Devi Priya
2024-01-29  5:11 ` [PATCH V3 3/7] clk: qcom: gcc-ipq9574: Add gpll0_out_aux clock & enable few nssnoc clocks Devi Priya
2024-01-29  9:37   ` Dmitry Baryshkov
2024-01-29  5:11 ` [PATCH V3 4/7] dt-bindings: clock: Add ipq9574 NSSCC clock and reset definitions Devi Priya
2024-01-29  5:11 ` [PATCH V3 5/7] clk: qcom: Add NSS clock Controller driver for IPQ9574 Devi Priya
2024-04-08 19:21   ` mr.nuke.me
2024-01-29  5:11 ` Devi Priya [this message]
2024-01-29  5:11 ` [PATCH V3 7/7] arm64: defconfig: Build NSS Clock " Devi Priya

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