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AJvYcCXVMOaQwkYPMNvIUbsECNYhBj6uJyW0Az5lgABcVOcjPJ1PItHKefQ2dolznZHXguK2kejIxClZonSfHRM81WXAtzpQ3m5UK244ZOkMnUUf6awsIAryM7yXXj2EQeBmqZgEXcicZxSJG7+EzVhu+XA58LmfR25eIOM5gE1PR/4j3/a6ag== X-Gm-Message-State: AOJu0Yx9JFL6CyX4tDcqmX5KoaFUtCsFKyff1QLyQ49Uliv3qZ8g9V8S 9NXftgxRmr2oFIsLKEELu0qoiNHETyBgFx0aNtnA2qEcDEAYCBQ= X-Google-Smtp-Source: AGHT+IFecuxCJWM/nUWDhGJ7gBSfItZDqcg8FMCaOxeHy6FMY+wOyJdPzB48iweW2PiFVOX6Z6J58A== X-Received: by 2002:a05:6512:210a:b0:51d:9921:20f7 with SMTP id 2adb3069b0e04-5217c56f496mr3116279e87.40.1715256445211; Thu, 09 May 2024 05:07:25 -0700 (PDT) Received: from U4.lan ([2a02:810b:f40:4600:b44:d8c3:6fa8:c46f]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-41fccce1912sm24112005e9.11.2024.05.09.05.07.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 May 2024 05:07:24 -0700 (PDT) From: Alex Bee To: Sandy Huang , =?UTF-8?q?Heiko=20St=C3=BCbner?= , Andy Yan , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Alex Bee Subject: [PATCH v2 4/7] drm/rockchip: dsi: Support optional AHB clock Date: Thu, 9 May 2024 14:07:12 +0200 Message-ID: <20240509120715.86694-5-knaerzche@gmail.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240509120715.86694-1-knaerzche@gmail.com> References: <20240509120715.86694-1-knaerzche@gmail.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Some integrations of the IP additionally have an AHB clock which has to be enabled before accessing the registers is possible. Add support for it as an optional clock. Signed-off-by: Alex Bee --- changes since v1: - new patch .../gpu/drm/rockchip/dw-mipi-dsi-rockchip.c | 25 +++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c index 4cc8ed8f4fbd..6ed64cc35275 100644 --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c @@ -265,6 +265,7 @@ struct dw_mipi_dsi_rockchip { struct clk *pllref_clk; struct clk *grf_clk; struct clk *phy_cfg_clk; + struct clk *ahb_clk; /* dual-channel */ bool is_slave; @@ -1153,7 +1154,15 @@ static int dw_mipi_dsi_dphy_init(struct phy *phy) goto err_init; } + ret = clk_prepare_enable(dsi->ahb_clk); + if (ret) { + clk_disable_unprepare(dsi->grf_clk); + clk_disable_unprepare(dsi->pclk); + goto err_init; + } + ret = dsi->cdata->dphy_rx_init(phy); + clk_disable_unprepare(dsi->ahb_clk); clk_disable_unprepare(dsi->grf_clk); clk_disable_unprepare(dsi->pclk); if (ret < 0) @@ -1240,6 +1249,12 @@ static int dw_mipi_dsi_dphy_power_on(struct phy *phy) goto err_phy_cfg_clk; } + ret = clk_prepare_enable(dsi->ahb_clk); + if (ret) { + DRM_DEV_ERROR(dsi->dev, "Failed to enable ahb_clk: %d\n", ret); + goto err_ahb_clk; + } + /* do soc-variant specific init */ if (dsi->cdata->dphy_rx_power_on) { ret = dsi->cdata->dphy_rx_power_on(phy); @@ -1269,6 +1284,8 @@ static int dw_mipi_dsi_dphy_power_on(struct phy *phy) return ret; err_pwr_on: + clk_disable_unprepare(dsi->ahb_clk); +err_ahb_clk: clk_disable_unprepare(dsi->phy_cfg_clk); err_phy_cfg_clk: clk_disable_unprepare(dsi->grf_clk); @@ -1296,6 +1313,7 @@ static int dw_mipi_dsi_dphy_power_off(struct phy *phy) DRM_DEV_ERROR(dsi->dev, "hardware-specific phy shutdown failed: %d\n", ret); } + clk_disable_unprepare(dsi->ahb_clk); clk_disable_unprepare(dsi->grf_clk); clk_disable_unprepare(dsi->pclk); @@ -1429,6 +1447,13 @@ static int dw_mipi_dsi_rockchip_probe(struct platform_device *pdev) } } + dsi->ahb_clk = devm_clk_get_optional(dev, "ahb"); + if (IS_ERR(dsi->ahb_clk)) { + ret = PTR_ERR(dsi->ahb_clk); + DRM_DEV_ERROR(dev, "Unable to get ahb_clk: %d\n", ret); + return ret; + } + dsi->grf_regmap = syscon_regmap_lookup_by_phandle(np, "rockchip,grf"); if (IS_ERR(dsi->grf_regmap)) { DRM_DEV_ERROR(dev, "Unable to get rockchip,grf\n"); -- 2.43.2