[PATCH 0/7] clk: sunxi-ng: add A523 clock support

Andre Przywara
2024-11-11T00:47:33Z

Hi,

this series introduces basic clock support for the Allwinner A523 family
of SoCs (comprising A523, A527, T527). [1]
The SoC contains *four* CCU components, aside from the usual main clock
device and the PRCM clock (in the always-on-domain), there is an MCU
clock and a DSP clock. This series just adds support for the first two,
the other two don't seem to be required for the basic functionality.

The clock tree of each SoC has always been individual, even though the
main clock *types* mostly remain the same. This time we see two slight
variations: There is an MP clock without the P (shift) part, and there
is one with two dividers instead of one divider and one shift field.
The first three patches add support for these new clock types.

The remaining four patches then add the DT bindings documentation and
describe all the clocks and their relationship in gory detail.
I split the binding patches up, since they contain the header files
naming the clocks, let me know if they should be in one patch instead.

Interestingly the Allwinner BSP has switched to using the existing sunxi
CCU framework for modelling the clocks (they had their own way before), so
we could theoretically use their code. However when I started working on
this about a year ago, their files had a GPL-3.0-only license header,
which, according to my research, makes them incompatible for mainline
inclusion. I thus started from "scratch" (adjusting the D1 driver, really).
Meanwhile they seem to have changed the license, and a quick comparison
turned up some differences, some of which seem to be bugs on their, some
on my side, probably. I hope having such a "reference" helps the mainline
code quality, as people can help the review by comparing code.

Also we only have a user manual for the A523, but its siblings introduce
more clocks (HDMI, NPU, etc.). I tried to close the gaps by looking at
some BSP code, and also by probing registers on actual hardware, to see
which clocks implement which bits.

Given the level of detail required in CCU drivers, I am certain there are
many bugs in there, also many things that can be improved. But after
starring and editing this for weeks, I feel like it's time for the
community to have a look, so please help with the review, and also test.

Based on v6.12-rc1.

Cheers,
Andre

[1] https://linux-sunxi.org/A523#Family_of_sun55iw3

Andre Przywara (7):
clk: sunxi-ng: mp: Add SUNXI_CCU_P_DATA_WITH_MUX_GATE wrapper
clk: sunxi-ng: mp: introduce dual-divider clock
clk: sunxi-ng: mp: provide wrapper for setting feature flags
dt-bindings: clk: sunxi-ng: add compatible for the A523 CCU
dt-bindings: clk: sunxi-ng: add compatible for the A523 PRCM-CCU
clk: sunxi-ng: Add support for the A523/T527 CCU
clk: sunxi-ng: add support for the A523/T527 PRCM CCU

.../clock/allwinner,sun4i-a10-ccu.yaml | 76 +-
drivers/clk/sunxi-ng/Kconfig | 10 +
drivers/clk/sunxi-ng/Makefile | 4 +
drivers/clk/sunxi-ng/ccu-sun55i-a523-r.c | 245 +++
drivers/clk/sunxi-ng/ccu-sun55i-a523-r.h | 14 +
drivers/clk/sunxi-ng/ccu-sun55i-a523.c | 1628 +++++++++++++++++
drivers/clk/sunxi-ng/ccu-sun55i-a523.h | 14 +
drivers/clk/sunxi-ng/ccu_common.h | 1 +
drivers/clk/sunxi-ng/ccu_mp.c | 51 +-
drivers/clk/sunxi-ng/ccu_mp.h | 39 +-
include/dt-bindings/clock/sun55i-a523-ccu.h | 187 ++
include/dt-bindings/clock/sun55i-a523-r-ccu.h | 36 +
include/dt-bindings/reset/sun55i-a523-ccu.h | 87 +
include/dt-bindings/reset/sun55i-a523-r-ccu.h | 25 +
14 files changed, 2377 insertions(+), 40 deletions(-)
create mode 100644 drivers/clk/sunxi-ng/ccu-sun55i-a523-r.c
create mode 100644 drivers/clk/sunxi-ng/ccu-sun55i-a523-r.h
create mode 100644 drivers/clk/sunxi-ng/ccu-sun55i-a523.c
create mode 100644 drivers/clk/sunxi-ng/ccu-sun55i-a523.h
create mode 100644 include/dt-bindings/clock/sun55i-a523-ccu.h
create mode 100644 include/dt-bindings/clock/sun55i-a523-r-ccu.h
create mode 100644 include/dt-bindings/reset/sun55i-a523-ccu.h
create mode 100644 include/dt-bindings/reset/sun55i-a523-r-ccu.h

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2.46.2