Linux clock framework development
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From: Ragavendra <ragavendra.bn@gmail.com>
To: mturquette@baylibre.com, sboyd@kernel.org,
	unicorn_wang@outlook.com, inochiama@outlook.com
Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
	Ragavendra <ragavendra.bn@gmail.com>
Subject: [PATCH] clk:sophgo:clk-cv18xx-pll
Date: Tue, 12 Nov 2024 14:58:32 -0800	[thread overview]
Message-ID: <20241112225832.3518658-1-ragavendra.bn@gmail.com> (raw)

Initializing the val variable of type u32 as it was not initialized.

Signed-off-by: Ragavendra Nagraj <ragavendra.bn@gmail.com>
---
 drivers/clk/sophgo/clk-cv18xx-pll.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/sophgo/clk-cv18xx-pll.c b/drivers/clk/sophgo/clk-cv18xx-pll.c
index 29e24098bf5f..04a0419cab4e 100644
--- a/drivers/clk/sophgo/clk-cv18xx-pll.c
+++ b/drivers/clk/sophgo/clk-cv18xx-pll.c
@@ -87,7 +87,7 @@ static int ipll_find_rate(const struct cv1800_clk_pll_limit *limit,
 
 static int ipll_determine_rate(struct clk_hw *hw, struct clk_rate_request *req)
 {
-	u32 val;
+	u32 val = 0;
 	struct cv1800_clk_pll *pll = hw_to_cv1800_clk_pll(hw);
 
 	return ipll_find_rate(pll->pll_limit, req->best_parent_rate,
-- 
2.46.1


             reply	other threads:[~2024-11-12 23:00 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-12 22:58 Ragavendra [this message]
2024-11-13  0:33 ` [PATCH] clk:sophgo:clk-cv18xx-pll Chen Wang
2024-11-13  1:16   ` Inochi Amaoto

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