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Sat, 23 Nov 2024 01:06:58 -0800 (PST) Date: Sat, 23 Nov 2024 14:36:50 +0530 From: Manivannan Sadhasivam To: Lorenzo Bianconi Cc: Ryder Lee , Jianjun Wang , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno , Michael Turquette , Stephen Boyd , linux-pci@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org Subject: Re: [PATCH v4 3/6] PCI: mediatek-gen3: Move reset/assert callbacks in .power_up() Message-ID: <20241123090650.imccksnmovmt2pps@thinkpad> References: <20241118-pcie-en7581-fixes-v4-0-24bb61703ad7@kernel.org> <20241118-pcie-en7581-fixes-v4-3-24bb61703ad7@kernel.org> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20241118-pcie-en7581-fixes-v4-3-24bb61703ad7@kernel.org> On Mon, Nov 18, 2024 at 09:04:55AM +0100, Lorenzo Bianconi wrote: > In order to make the code more readable, the reset_control_bulk_assert() > for PHY reset lines is moved to make it pair with > reset_control_bulk_deassert() in mtk_pcie_power_up() and > mtk_pcie_en7581_power_up(). The same change is done for > reset_control_assert() used to assert MAC reset line. > > Introduce PCIE_MTK_RESET_TIME_US macro for the time needed to > complete PCIe reset on MediaTek controller. > > Reviewed-by: AngeloGioacchino Del Regno > Signed-off-by: Lorenzo Bianconi Reviewed-by: Manivannan Sadhasivam - Mani > --- > drivers/pci/controller/pcie-mediatek-gen3.c | 27 +++++++++++++++++++-------- > 1 file changed, 19 insertions(+), 8 deletions(-) > > diff --git a/drivers/pci/controller/pcie-mediatek-gen3.c b/drivers/pci/controller/pcie-mediatek-gen3.c > index 3cfcb45d31508142d28d338ff213f70de9b4e608..2b80edd4462ad4e9f2a5d192db7f99307113eb8a 100644 > --- a/drivers/pci/controller/pcie-mediatek-gen3.c > +++ b/drivers/pci/controller/pcie-mediatek-gen3.c > @@ -125,6 +125,8 @@ > > #define MAX_NUM_PHY_RESETS 3 > > +#define PCIE_MTK_RESET_TIME_US 10 > + > /* Time in ms needed to complete PCIe reset on EN7581 SoC */ > #define PCIE_EN7581_RESET_TIME_MS 100 > > @@ -912,6 +914,14 @@ static int mtk_pcie_en7581_power_up(struct mtk_gen3_pcie *pcie) > int err; > u32 val; > > + /* > + * The controller may have been left out of reset by the bootloader > + * so make sure that we get a clean start by asserting resets here. > + */ > + reset_control_bulk_assert(pcie->soc->phy_resets.num_resets, > + pcie->phy_resets); > + reset_control_assert(pcie->mac_reset); > + > /* > * Wait for the time needed to complete the bulk assert in > * mtk_pcie_setup for EN7581 SoC. > @@ -986,6 +996,15 @@ static int mtk_pcie_power_up(struct mtk_gen3_pcie *pcie) > struct device *dev = pcie->dev; > int err; > > + /* > + * The controller may have been left out of reset by the bootloader > + * so make sure that we get a clean start by asserting resets here. > + */ > + reset_control_bulk_assert(pcie->soc->phy_resets.num_resets, > + pcie->phy_resets); > + reset_control_assert(pcie->mac_reset); > + usleep_range(PCIE_MTK_RESET_TIME_US, 2 * PCIE_MTK_RESET_TIME_US); > + > /* PHY power on and enable pipe clock */ > err = reset_control_bulk_deassert(pcie->soc->phy_resets.num_resets, pcie->phy_resets); > if (err) { > @@ -1070,14 +1089,6 @@ static int mtk_pcie_setup(struct mtk_gen3_pcie *pcie) > * counter since the bulk is shared. > */ > reset_control_bulk_deassert(pcie->soc->phy_resets.num_resets, pcie->phy_resets); > - /* > - * The controller may have been left out of reset by the bootloader > - * so make sure that we get a clean start by asserting resets here. > - */ > - reset_control_bulk_assert(pcie->soc->phy_resets.num_resets, pcie->phy_resets); > - > - reset_control_assert(pcie->mac_reset); > - usleep_range(10, 20); > > /* Don't touch the hardware registers before power up */ > err = pcie->soc->power_up(pcie); > > -- > 2.47.0 > -- மணிவண்ணன் சதாசிவம்