[PATCH v2 12/16] ARM: dts: microchip: sama7g5: Add OTPC clocks

Alexander Dahl
2025-02-11T06:52:33Z

These clocks should be enabled, datasheet says:

> The OTPC is clocked through the Power Management Controller (PMC).
> The user must power on the main RC oscillator and enable the
> peripheral clock of the OTPC prior to reading or writing the OTP
> memory.

Earlier discussions suggest, MCK0 must be enabled, too. MCK0 is parent
of peripheral otpc_clk, so this is done implicitly.

Link: https://lore.kernel.org/linux-clk/ec34efc2-2051-4b8a-b5d8-6e2fd5e08c28@microchip.com/T/#u
Signed-off-by: Alexander Dahl <ada@thorsis.com>
---

Notes:
v2:
- new patch, not present in v1

arch/arm/boot/dts/microchip/sama7g5.dtsi | 2 ++
1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/microchip/sama7g5.dtsi b/arch/arm/boot/dts/microchip/sama7g5.dtsi
index f68c2eb8edd54..b33204688b90c 100644
--- a/arch/arm/boot/dts/microchip/sama7g5.dtsi
+++ b/arch/arm/boot/dts/microchip/sama7g5.dtsi
@@ -1023,6 +1023,8 @@ otpc: efuse@e8c00000 {
reg = <0xe8c00000 0x100>;
#address-cells = <1>;
#size-cells = <1>;
+ clocks = <&pmc PMC_TYPE_CORE SAMA7G5_PMC_MAIN_RC>, <&pmc PMC_TYPE_PERIPHERAL 67>;
+ clock-names = "main_rc_osc", "otpc_clk";

temperature_calib: calib@1 {
reg = <OTP_PKT(1) 76>;
--
2.39.5