Re: [PATCH v3 1/5] dt-bindings: clock: Document clock and reset unit of RK3528

Yao Zi
2025-02-24T17:35:28Z

On Mon, Feb 24, 2025 at 10:09:29AM +0100, Heiko Stübner wrote:
> Am Montag, 17. Februar 2025, 07:11:42 MEZ schrieb Yao Zi:
> > There are two types of clocks in RK3528 SoC, CRU-managed and
> > SCMI-managed. Independent IDs are assigned to them.
> >
> > For the reset part, differing from previous Rockchip SoCs and
> > downstream bindings which embeds register offsets into the IDs, gapless
> > numbers starting from zero are used.
> >
> > Signed-off-by: Yao Zi <ziyao@disroot.org>
> > ---
> > .../bindings/clock/rockchip,rk3528-cru.yaml | 64 +++
> > .../dt-bindings/clock/rockchip,rk3528-cru.h | 453 ++++++++++++++++++
> > .../dt-bindings/reset/rockchip,rk3528-cru.h | 241 ++++++++++
> > 3 files changed, 758 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3528-cru.yaml
> > create mode 100644 include/dt-bindings/clock/rockchip,rk3528-cru.h
> > create mode 100644 include/dt-bindings/reset/rockchip,rk3528-cru.h
> >
> > diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3528-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3528-cru.yaml
> > new file mode 100644
> > index 000000000000..5a3ec902351c
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3528-cru.yaml
> > @@ -0,0 +1,64 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/clock/rockchip,rk3528-cru.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Rockchip RK3528 Clock and Reset Controller
> > +
> > +maintainers:
> > + - Yao Zi <ziyao@disroot.org>
> > +
> > +description: |
> > + The RK3528 clock controller generates the clock and also implements a reset
> > + controller for SoC peripherals. For example, it provides SCLK_UART0 and
> > + PCLK_UART0 as well as SRST_P_UART0 and SRST_S_UART0 for the first UART
> > + module.
> > + Each clock is assigned an identifier, consumer nodes can use it to specify
> > + the clock. All available clock and reset IDs are defined in dt-binding
> > + headers.
> > +
> > +properties:
> > + compatible:
> > + const: rockchip,rk3528-cru
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + clocks:
>
> I do think this needs a
> minItems: 1
> maxItems: 2
> or similar.
>
> xin24m is the main oscillator everything else is supplied from, so is
> absolutely required, but that gmac0 supply comes from an (probably)
> optional clock supply from a mac phy?
>
> So is possibly not available on a system without ethernet hardware?

I don't think so. By the CRU commit message[1] in the vendor driver, the
"phy module" should mean the integrated phy for GMAC0,

The io-in clocks are module phy output clock, gating child
clocks by disabling phy output but not CRU gate.

Add gmac0 clocks. They are all orphans if clk_gmac0_io_i is not
registered by GMAC driver. But it's fine that GMAC driver only
get it but not to set/get rate.

(gmac0 is called "clk_gmac0_io_i" in the vendor driver).

Taking that both the upstream and downstream Rockchip GMAC glue (GMAC
driver) takes some care of the integrated phy, if the clock is an
out-of-SoC supply, the second paragraph sounds less sensible: the clock
should be registered by the external PHY instead of the GMAC driver in
this case.

And there cannot be a case that an integrated clocksource is missing.

>
>
> Heiko
>
>

Thanks,
Yao Zi

[1]: https://github.com/rockchip-linux/kernel/commit/16f512f1e10375dc48aa6c26cedeb7079aba01de