Re: [PATCH v5 2/5] dt-bindings: clock: spacemit: Add spacemit,k1-pll

Yixun Lan
2025-03-07T00:29:54Z

Hi Haylen:

On 17:57 Thu 06 Mar , Haylen Chu wrote:
> Add definition for the PLL found on Spacemit K1 SoC, which takes the
> external 24MHz oscillator as input and generates clocks in various
> frequencies for the system.
>
> Signed-off-by: Haylen Chu <heylenay@4d2.org>
> ---
> .../bindings/clock/spacemit,k1-pll.yaml | 50 +++++++++++++++++++
> include/dt-bindings/clock/spacemit,k1-ccu.h | 37 ++++++++++++++
> 2 files changed, 87 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/spacemit,k1-pll.yaml
>
> diff --git a/Documentation/devicetree/bindings/clock/spacemit,k1-pll.yaml b/Documentation/devicetree/bindings/clock/spacemit,k1-pll.yaml
> new file mode 100644
> index 000000000000..23d7aa1bc573
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/spacemit,k1-pll.yaml
> @@ -0,0 +1,50 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/spacemit,k1-pll.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Spacemit K1 PLL
> +
> +maintainers:
> + - Haylen Chu <heylenay@4d2.org>
> +
> +properties:
> + compatible:
> + const: spacemit,k1-pll
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + description: External 24MHz oscillator
> +
> + spacemit,mpmu:
how about naming it as "spacemit,mpmu-syscon" explicitly?
to indicate this is a syscon phandle, it's more readable

> + $ref: /schemas/types.yaml#/definitions/phandle
> + description:
> + Phandle to the "Main PMU (MPMU)" syscon. It is used to check PLL
> + lock status.
> +
> + "#clock-cells":
> + const: 1
> + description:
> + See <dt-bindings/clock/spacemit,k1-ccu.h> for valid indices.
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - spacemit,mpmu
> + - "#clock-cells"
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + clock-controller@d4090000 {
> + compatible = "spacemit,k1-pll";
> + reg = <0xd4090000 0x1000>;
> + clocks = <&vctcxo_24m>;
> + spacemit,mpmu = <&sysctl_mpmu>;
> + #clock-cells = <1>;
> + };
> diff --git a/include/dt-bindings/clock/spacemit,k1-ccu.h b/include/dt-bindings/clock/spacemit,k1-ccu.h
> index 1f8b01db44ca..4a0c7163257e 100644
> --- a/include/dt-bindings/clock/spacemit,k1-ccu.h
> +++ b/include/dt-bindings/clock/spacemit,k1-ccu.h
> @@ -6,6 +6,43 @@
> #ifndef _DT_BINDINGS_SPACEMIT_CCU_H_
> #define _DT_BINDINGS_SPACEMIT_CCU_H_
>
> +/* APBS (PLL) clocks */
> +#define CLK_PLL1 0
> +#define CLK_PLL2 1
> +#define CLK_PLL3 2
> +#define CLK_PLL1_D2 3
> +#define CLK_PLL1_D3 4
> +#define CLK_PLL1_D4 5
> +#define CLK_PLL1_D5 6
> +#define CLK_PLL1_D6 7
> +#define CLK_PLL1_D7 8
> +#define CLK_PLL1_D8 9
> +#define CLK_PLL1_D11 10
> +#define CLK_PLL1_D13 11
> +#define CLK_PLL1_D23 12
> +#define CLK_PLL1_D64 13
> +#define CLK_PLL1_D10_AUD 14
> +#define CLK_PLL1_D100_AUD 15
> +#define CLK_PLL2_D1 16
> +#define CLK_PLL2_D2 17
> +#define CLK_PLL2_D3 18
> +#define CLK_PLL2_D4 19
> +#define CLK_PLL2_D5 20
> +#define CLK_PLL2_D6 21
> +#define CLK_PLL2_D7 22
> +#define CLK_PLL2_D8 23
> +#define CLK_PLL3_D1 24
> +#define CLK_PLL3_D2 25
> +#define CLK_PLL3_D3 26
> +#define CLK_PLL3_D4 27
> +#define CLK_PLL3_D5 28
> +#define CLK_PLL3_D6 29
> +#define CLK_PLL3_D7 30
> +#define CLK_PLL3_D8 31
> +#define CLK_PLL3_80 32
> +#define CLK_PLL3_40 33
> +#define CLK_PLL3_20 34
> +
> /* MPMU clocks */
> #define CLK_PLL1_307P2 0
> #define CLK_PLL1_76P8 1
> --
> 2.48.1
>

--
Yixun Lan (dlan)
Gentoo Linux Developer
GPG Key ID AABEFD55