From: Inochi Amaoto <inochiama@gmail.com>
To: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Chen Wang <unicorn_wang@outlook.com>,
Inochi Amaoto <inochiama@gmail.com>,
Richard Cochran <richardcochran@gmail.com>,
Alexander Sverdlin <alexander.sverdlin@gmail.com>,
Arnd Bergmann <arnd@arndb.de>,
Linus Walleij <linus.walleij@linaro.org>,
Vinod Koul <vkoul@kernel.org>,
Nikita Shubin <nikita.shubin@maquefel.me>
Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
sophgo@lists.linux.dev, linux-kernel@vger.kernel.org,
netdev@vger.kernel.org, Yixun Lan <dlan@gentoo.org>,
Longbin Li <looong.bin@gmail.com>
Subject: [PATCH v4 1/5] dt-bindings: soc: sophgo: Add SG2044 top syscon device
Date: Mon, 14 Apr 2025 06:44:45 +0800 [thread overview]
Message-ID: <20250413224450.67244-2-inochiama@gmail.com> (raw)
In-Reply-To: <20250413224450.67244-1-inochiama@gmail.com>
The SG2044 top syscon device provide PLL clock control and some other
misc feature of the SoC.
Add the compatible string for SG2044 top syscon device.
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
---
.../soc/sophgo/sophgo,sg2044-top-syscon.yaml | 49 +++++++++++++++++++
include/dt-bindings/clock/sophgo,sg2044-pll.h | 27 ++++++++++
2 files changed, 76 insertions(+)
create mode 100644 Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2044-top-syscon.yaml
create mode 100644 include/dt-bindings/clock/sophgo,sg2044-pll.h
diff --git a/Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2044-top-syscon.yaml b/Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2044-top-syscon.yaml
new file mode 100644
index 000000000000..a82cc3cae576
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2044-top-syscon.yaml
@@ -0,0 +1,49 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/sophgo/sophgo,sg2044-top-syscon.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Sophgo SG2044 SoC TOP system controller
+
+maintainers:
+ - Inochi Amaoto <inochiama@gmail.com>
+
+description:
+ The Sophgo SG2044 TOP system controller is a hardware block grouping
+ multiple small functions, such as clocks and some other internal
+ function.
+
+properties:
+ compatible:
+ items:
+ - const: sophgo,sg2044-top-syscon
+ - const: syscon
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ '#clock-cells':
+ const: 1
+ description:
+ See <dt-bindings/clock/sophgo,sg2044-pll.h> for valid clock.
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - '#clock-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ syscon@50000000 {
+ compatible = "sophgo,sg2044-top-syscon", "syscon";
+ reg = <0x50000000 0x1000>;
+ #clock-cells = <1>;
+ clocks = <&osc>;
+ };
diff --git a/include/dt-bindings/clock/sophgo,sg2044-pll.h b/include/dt-bindings/clock/sophgo,sg2044-pll.h
new file mode 100644
index 000000000000..817d45e700cc
--- /dev/null
+++ b/include/dt-bindings/clock/sophgo,sg2044-pll.h
@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
+/*
+ * Copyright (C) 2024 Inochi Amaoto <inochiama@gmail.com>
+ */
+
+#ifndef __DT_BINDINGS_SOPHGO_SG2044_PLL_H__
+#define __DT_BINDINGS_SOPHGO_SG2044_PLL_H__
+
+#define CLK_FPLL0 0
+#define CLK_FPLL1 1
+#define CLK_FPLL2 2
+#define CLK_DPLL0 3
+#define CLK_DPLL1 4
+#define CLK_DPLL2 5
+#define CLK_DPLL3 6
+#define CLK_DPLL4 7
+#define CLK_DPLL5 8
+#define CLK_DPLL6 9
+#define CLK_DPLL7 10
+#define CLK_MPLL0 11
+#define CLK_MPLL1 12
+#define CLK_MPLL2 13
+#define CLK_MPLL3 14
+#define CLK_MPLL4 15
+#define CLK_MPLL5 16
+
+#endif /* __DT_BINDINGS_SOPHGO_SG2044_PLL_H__ */
--
2.49.0
next prev parent reply other threads:[~2025-04-13 22:45 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-13 22:44 [PATCH v4 0/5] clk: sophgo: add SG2044 clock controller support Inochi Amaoto
2025-04-13 22:44 ` Inochi Amaoto [this message]
2025-04-14 6:44 ` [PATCH v4 1/5] dt-bindings: soc: sophgo: Add SG2044 top syscon device Krzysztof Kozlowski
2025-04-13 22:44 ` [PATCH v4 2/5] soc: sophgo: sg2044: Add support for SG2044 TOP " Inochi Amaoto
2025-04-13 22:44 ` [PATCH v4 3/5] dt-bindings: clock: sophgo: add clock controller for SG2044 Inochi Amaoto
2025-04-14 6:46 ` Krzysztof Kozlowski
2025-04-13 22:44 ` [PATCH v4 4/5] clk: sophgo: Add PLL clock controller support for SG2044 SoC Inochi Amaoto
2025-04-14 6:40 ` Krzysztof Kozlowski
2025-04-13 22:44 ` [PATCH v4 5/5] clk: sophgo: Add " Inochi Amaoto
2025-04-14 6:42 ` Krzysztof Kozlowski
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