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Wed, 23 Apr 2025 04:41:59 +0000 (GMT) X-AuditID: b6c32a29-55afd7000000223e-8e-68086f979b3c Received: from epsmtip1.samsung.com ( [182.195.34.30]) by epsmgms1p1new.samsung.com (Symantec Messaging Gateway) with SMTP id C6.39.08766.79F68086; Wed, 23 Apr 2025 13:41:59 +0900 (KST) Received: from localhost.localdomain (unknown [10.229.9.60]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250423044158epsmtip14cb568c54e7f3cd244a32bacd9f448e1~42OGU9tmi1643416434epsmtip1K; Wed, 23 Apr 2025 04:41:58 +0000 (GMT) From: Shin Son To: Krzysztof Kozlowski , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Rob Herring , Conor Dooley , Sunyeal Hong Cc: Shin Son , linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 0/3] add CPUCL0 clock support for exynosauto v920 SoC Date: Wed, 23 Apr 2025 13:41:50 +0900 Message-ID: <20250423044153.1288077-1-shin.son@samsung.com> X-Mailer: git-send-email 2.49.0 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrMLMWRmVeSWpSXmKPExsWy7bCSnO70fI4Mg/4TvBYP5m1js1iz9xyT xfUvz1kt5h85x2px/vwGdotNj6+xWnzsucdqcXnXHDaLGef3MVlcPOVq8X/PDnaLw2/aWS3+ XdvIYjH5+FpWi6Zl65kc+D3e32hl99i0qpPNY/OSeo++LasYPT5vkgtgjeKySUnNySxLLdK3 S+DK+Prbs+Ara0XftX6mBsaHLF2MnBwSAiYSqw/OZO5i5OIQEtjNKNG64TY7REJC4vCMCYwQ trDE/ZYjrBBF7xklfs5tA0pwcLAJqEps+i0PEhcReMsksfz/ASaQBmaB04wSO8/IgNjCAh4S R3+vZAaxWYDq7/bNBavhFbCWaH2/nw1kjoSAvER/hwREWFDi5MwnLBBj5CWat85mnsDINwtJ ahaS1AJGplWMkqkFxbnpucWGBYZ5qeV6xYm5xaV56XrJ+bmbGMHhrqW5g3H7qg96hxiZOBgP MUpwMCuJ8P5yY88Q4k1JrKxKLcqPLyrNSS0+xCjNwaIkziv+ojdFSCA9sSQ1OzW1ILUIJsvE wSnVwLS83P3CEUnHXMWou7ub+0T+xL08mCvmMHNCm/JV6XOX2c2/XXbbXnxNdUbChuqTq/9u zL1d4KZsIjd7R1DOo1uRotafNa5r1Cv7MyjbNZWyLt8ncTPrzg/t5CWCIkucHk7MV7Fkvu+R XJDCHRe4znWiwcrz7JOEZxu8V3qyuj2x/nPb3rcN54067IW5rm86Wp0dpyfwfe+ZI7EnxD9M CPtVxTAjO2XvfD+Xe5c109+65PG//LPNeYUdu86H+7yXFhexcs21jZc6t7fjtpuHYeKZD5Mf qAt9t3nqdLXh7m3OGhU+odx70otuSXXZZdZPe2Mxm+XB3xnOaosCJ52M+CEU+PpzwIrXey/s CeO+6afEUpyRaKjFXFScCAAoLY/L5gIAAA== X-CMS-MailID: 20250423044159epcas2p2a064b6cd52806f765f830240adaf69a5 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P cpgsPolicy: CPGSC10-234,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250423044159epcas2p2a064b6cd52806f765f830240adaf69a5 References: This patchset adds the CMU_CPUCL0 block to support exynosauto v920 SoC Changes in v2: - Add a brief description of the hardware - Explain why CLK_OF_DECLARE is used - Convert uppercase hex value to lowercase - Aligned previously misaligned lines Shin Son (3): dt-bindings: clock: exynosautov920: add cpucl0 clock definitions clk: samsung: exynosautov920: add cpucl0 clock support arm64: dts: exynosautov920: add cpucl0 clock DT nodes .../clock/samsung,exynosautov920-clock.yaml | 25 ++++ .../arm64/boot/dts/exynos/exynosautov920.dtsi | 15 ++ drivers/clk/samsung/clk-exynosautov920.c | 130 ++++++++++++++++++ .../clock/samsung,exynosautov920.h | 19 +++ 4 files changed, 189 insertions(+) -- 2.49.0