From: Shin Son <shin.son@samsung.com>
To: Krzysztof Kozlowski <krzk@kernel.org>,
Sylwester Nawrocki <s.nawrocki@samsung.com>,
Chanwoo Choi <cw00.choi@samsung.com>,
Alim Akhtar <alim.akhtar@samsung.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Sunyeal Hong <sunyeal.hong@samsung.com>
Cc: Shin Son <shin.son@samsung.com>,
linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v2 3/4] clk: samsung: exynosautov920: Fix incorrect CLKS_NR_CPUCL0 definition
Date: Mon, 28 Apr 2025 20:35:16 +0900 [thread overview]
Message-ID: <20250428113517.426987-4-shin.son@samsung.com> (raw)
In-Reply-To: <20250428113517.426987-1-shin.son@samsung.com>
The CLKS_NR_CPUCL0 macro was incorrectly defined based on a wrong clock ID.
It mistakenly referenced CLK_DOUT_CLUSTER0_PERIPHCLK, which corresponds to
a cluster peripheral clock, not the last clock ID for CPUCL0 as intended.
This patch corrects the definition to use CLK_DOUT_CPUCL0_NOCP + 1,
properly matching the last clock ID for CPUCL0 as intended.
This error was due to confusion with the hardware diagram, and this patch
ensures that the number of clocks for CPUCL0 is correctly defined.
Signed-off-by: Shin Son <shin.son@samsung.com>
---
drivers/clk/samsung/clk-exynosautov920.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/samsung/clk-exynosautov920.c b/drivers/clk/samsung/clk-exynosautov920.c
index c1b0203b8cb4..f8168eed4a66 100644
--- a/drivers/clk/samsung/clk-exynosautov920.c
+++ b/drivers/clk/samsung/clk-exynosautov920.c
@@ -18,7 +18,7 @@
/* NOTE: Must be equal to the last clock ID increased by one */
#define CLKS_NR_TOP (DOUT_CLKCMU_TAA_NOC + 1)
-#define CLKS_NR_CPUCL0 (CLK_DOUT_CLUSTER0_PERIPHCLK + 1)
+#define CLKS_NR_CPUCL0 (CLK_DOUT_CPUCL0_NOCP + 1)
#define CLKS_NR_CPUCL1 (CLK_DOUT_CPUCL1_NOCP + 1)
#define CLKS_NR_CPUCL2 (CLK_DOUT_CPUCL2_NOCP + 1)
#define CLKS_NR_PERIC0 (CLK_DOUT_PERIC0_I3C + 1)
--
2.49.0
next prev parent reply other threads:[~2025-04-28 11:36 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20250428113540epcas2p4f8a2d6b473bdf6d71bd598e71fbf70c9@epcas2p4.samsung.com>
2025-04-28 11:35 ` [PATCH v2 0/4] Fix CPUCL0 add CPUCL1/2 clock support for exynosauto v920 SoC Shin Son
2025-04-28 11:35 ` [PATCH v2 1/4] dt-bindings: clock: exynosautov920: add cpucl1/2 clock definitions Shin Son
2025-04-30 7:28 ` (subset) " Krzysztof Kozlowski
2025-04-28 11:35 ` [PATCH v2 2/4] clk: samsung: exynosautov920: add cpucl1/2 clock support Shin Son
2025-04-30 7:28 ` (subset) " Krzysztof Kozlowski
2025-04-28 11:35 ` Shin Son [this message]
2025-04-30 7:26 ` [PATCH v2 3/4] clk: samsung: exynosautov920: Fix incorrect CLKS_NR_CPUCL0 definition Krzysztof Kozlowski
2025-04-30 8:44 ` 손신
2025-04-30 7:28 ` (subset) " Krzysztof Kozlowski
2025-04-28 11:35 ` [PATCH v2 4/4] arm64: dts: exynosautov920: add cpucl1/2 clock DT nodes Shin Son
2025-04-30 7:28 ` (subset) " Krzysztof Kozlowski
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