From: Inochi Amaoto <inochiama@gmail.com>
To: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Chen Wang <unicorn_wang@outlook.com>,
Inochi Amaoto <inochiama@gmail.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Alexander Sverdlin <alexander.sverdlin@gmail.com>,
Thomas Bonnefille <thomas.bonnefille@bootlin.com>,
Jeff Johnson <jeff.johnson@oss.qualcomm.com>
Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
sophgo@lists.linux.dev, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org, Yixun Lan <dlan@gentoo.org>,
Longbin Li <looong.bin@gmail.com>
Subject: [PATCH 3/3] riscv: dts: sophgo: switch precise compatible for existed clock device for CV18XX
Date: Wed, 30 Apr 2025 10:09:31 +0800 [thread overview]
Message-ID: <20250430020932.307198-4-inochiama@gmail.com> (raw)
In-Reply-To: <20250430020932.307198-1-inochiama@gmail.com>
replace newly added precise compatible with old one for existed
clock device of CV18XX series SoCs.
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
---
arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 2 +-
arch/riscv/boot/dts/sophgo/cv1812h.dtsi | 2 +-
arch/riscv/boot/dts/sophgo/sg2002.dtsi | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
index 88707cc13fb4..90de978f69c1 100644
--- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
+++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
@@ -29,7 +29,7 @@ pinctrl: pinctrl@3001000 {
};
clk: clock-controller@3002000 {
- compatible = "sophgo,cv1800-clk";
+ compatible = "sophgo,cv1800b-clk";
reg = <0x03002000 0x1000>;
clocks = <&osc>;
#clock-cells = <1>;
diff --git a/arch/riscv/boot/dts/sophgo/cv1812h.dtsi b/arch/riscv/boot/dts/sophgo/cv1812h.dtsi
index 0974955e4e05..9a2a314d3347 100644
--- a/arch/riscv/boot/dts/sophgo/cv1812h.dtsi
+++ b/arch/riscv/boot/dts/sophgo/cv1812h.dtsi
@@ -31,7 +31,7 @@ pinctrl: pinctrl@3001000 {
};
clk: clock-controller@3002000 {
- compatible = "sophgo,cv1810-clk";
+ compatible = "sophgo,cv1812h-clk";
reg = <0x03002000 0x1000>;
clocks = <&osc>;
#clock-cells = <1>;
diff --git a/arch/riscv/boot/dts/sophgo/sg2002.dtsi b/arch/riscv/boot/dts/sophgo/sg2002.dtsi
index 6f09c9199102..b9e4b4687046 100644
--- a/arch/riscv/boot/dts/sophgo/sg2002.dtsi
+++ b/arch/riscv/boot/dts/sophgo/sg2002.dtsi
@@ -31,7 +31,7 @@ pinctrl: pinctrl@3001000 {
};
clk: clock-controller@3002000 {
- compatible = "sophgo,sg2000-clk";
+ compatible = "sophgo,sg2002-clk";
reg = <0x03002000 0x1000>;
clocks = <&osc>;
#clock-cells = <1>;
--
2.49.0
prev parent reply other threads:[~2025-04-30 2:10 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-30 2:09 [PATCH 0/3] riscv: sophgo: cv18xx: dts rework, part 2 Inochi Amaoto
2025-04-30 2:09 ` [PATCH 1/3] dt-bindings: clock: sophgo: Use precise compatible for CV1800 series SoC Inochi Amaoto
2025-04-30 2:09 ` [PATCH 2/3] clk: sophgo: Add support for newly added precise compatible Inochi Amaoto
2025-04-30 15:33 ` Conor Dooley
2025-04-30 15:37 ` Conor Dooley
2025-04-30 22:43 ` Inochi Amaoto
2025-05-01 14:22 ` Conor Dooley
2025-05-01 22:23 ` Inochi Amaoto
2025-04-30 22:42 ` Inochi Amaoto
2025-04-30 15:39 ` Alexander Sverdlin
2025-04-30 22:38 ` Inochi Amaoto
2025-04-30 2:09 ` Inochi Amaoto [this message]
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