From: Jian Hu <jian.hu@amlogic.com>
To: Jerome Brunet <jbrunet@baylibre.com>,
Xianwei Zhao <xianwei.zhao@amlogic.com>,
Chuan Liu <chuan.liu@amlogic.com>,
Neil Armstrong <neil.armstrong@linaro.org>,
Kevin Hilman <khilman@baylibre.com>,
"Stephen Boyd" <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
"Dmitry Rokosov" <ddrokosov@sberdevices.ru>,
robh+dt <robh+dt@kernel.org>, Rob Herring <robh@kernel.org>
Cc: Jian Hu <jian.hu@amlogic.com>,
devicetree <devicetree@vger.kernel.org>,
linux-clk <linux-clk@vger.kernel.org>,
linux-amlogic <linux-amlogic@lists.infradead.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>
Subject: [PATCH v3 0/6] add support for T7 family clock controller
Date: Fri, 9 May 2025 07:48:18 +0000 [thread overview]
Message-ID: <20250509074825.1933254-1-jian.hu@amlogic.com> (raw)
It introduces three clock controllers:
- SCMI clock controller: these clocks are managed by the SCP and handled through SCMI.
- PLL clock controller.
- peripheral clock controller.
Changes v3 since v2 at [2]:
- update T7 PLL YAML
- add 't7_' prefix for t7 clock name and variable in t7-pll.c and t7-peripherals.c
- correct v1 patch link
- add new macro MESON_PCLK_V2
- update the driver,header,yaml file license
Changes v2 since v1 at [1]:
- add CLK_MESON import
- add const for clkc_regmap_config in PLL driver
- fix eth_rmii_sel parent
- update T7 PLL YAML file
[1]: https://lore.kernel.org/all/20241231060047.2298871-1-jian.hu@amlogic.com
[2]: https://lore.kernel.org/all/20250108094025.2664201-1-jian.hu@amlogic.com
Jian Hu (6):
dt-bindings: clock: add Amlogic T7 PLL clock controller
dt-bindings: clock: add Amlogic T7 SCMI clock controller
dt-bindings: clock: add Amlogic T7 peripherals clock controller
clk: meson: t7: add support for the T7 SoC PLL clock
clk: meson: add MESON_PCLK_V2 for sys gate clock
clk: meson: t7: add t7 clock peripherals controller driver
.../clock/amlogic,t7-peripherals-clkc.yaml | 112 +
.../bindings/clock/amlogic,t7-pll-clkc.yaml | 114 +
drivers/clk/meson/Kconfig | 27 +
drivers/clk/meson/Makefile | 2 +
drivers/clk/meson/clk-regmap.h | 24 +
drivers/clk/meson/t7-peripherals.c | 2359 +++++++++++++++++
drivers/clk/meson/t7-pll.c | 1193 +++++++++
.../clock/amlogic,t7-peripherals-clkc.h | 230 ++
.../dt-bindings/clock/amlogic,t7-pll-clkc.h | 56 +
include/dt-bindings/clock/amlogic,t7-scmi.h | 47 +
10 files changed, 4164 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/amlogic,t7-peripherals-clkc.yaml
create mode 100644 Documentation/devicetree/bindings/clock/amlogic,t7-pll-clkc.yaml
create mode 100644 drivers/clk/meson/t7-peripherals.c
create mode 100644 drivers/clk/meson/t7-pll.c
create mode 100644 include/dt-bindings/clock/amlogic,t7-peripherals-clkc.h
create mode 100644 include/dt-bindings/clock/amlogic,t7-pll-clkc.h
create mode 100644 include/dt-bindings/clock/amlogic,t7-scmi.h
--
2.47.1
next reply other threads:[~2025-05-09 8:03 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-09 7:48 Jian Hu [this message]
2025-05-09 7:48 ` [PATCH v3 1/6] dt-bindings: clock: add Amlogic T7 PLL clock controller Jian Hu
2025-05-09 16:09 ` Conor Dooley
2025-05-09 7:48 ` [PATCH v3 2/6] dt-bindings: clock: add Amlogic T7 SCMI " Jian Hu
2025-05-09 7:48 ` [PATCH v3 3/6] dt-bindings: clock: add Amlogic T7 peripherals " Jian Hu
2025-05-09 7:48 ` [PATCH v3 4/6] clk: meson: t7: add support for the T7 SoC PLL clock Jian Hu
2025-05-14 7:52 ` Jerome Brunet
2025-06-12 13:02 ` Jian Hu
2025-06-16 16:27 ` Jerome Brunet
2025-06-25 2:52 ` Jian Hu
2025-06-25 7:46 ` Jerome Brunet
2025-07-03 3:42 ` Jian Hu
2025-05-09 7:48 ` [PATCH v3 5/6] clk: meson: add MESON_PCLK_V2 for sys gate clock Jian Hu
2025-05-14 7:39 ` Jerome Brunet
[not found] ` <ea83e375-7088-4047-92f1-31d0e7c2c331@amlogic.com>
2025-06-16 16:28 ` Jerome Brunet
2025-06-20 9:21 ` Jian Hu
2025-05-09 7:48 ` [PATCH v3 6/6] clk: meson: t7: add t7 clock peripherals controller driver Jian Hu
2025-05-14 8:00 ` Jerome Brunet
2025-06-13 9:39 ` Jian Hu
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