From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from relay.smtp-ext.broadcom.com (relay.smtp-ext.broadcom.com [192.19.166.231]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5F8B628CF47; Fri, 30 May 2025 23:42:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.19.166.231 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748648571; cv=none; b=p/pdnN2mCyXdXtL/V4UcYMRxiR0HHGbXCgzguG2wA1kbQ1b9iBkS/JSePqBHhNsxRkhoAyX+y8f1eNMYO86G0FF4vMONhySwcZiVdT5HrlqMXf49rKSBexYSbBssGL3sGwXgAoTi51lF8vLwOmV+1eB4SB2ZMPIIKm19BEHLk+U= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748648571; c=relaxed/simple; bh=ivFnA201Da9nFI5j1NeEkgfWIjM/gXg/rK/lbw6ySqI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=X84VcYay+Jy9q7qA+RAnHBmM9VmRfSxiYhzjuopnPfHXRN6py70eY5CTDj5eOu+obDChENdFgHkXgAZBhnX3aXM5B1oxfqI671fmZ+BjQV1gmd2WYJ1qAREawEOkUuYvHfJoKihb3vrJCoE3b8je/gGTQjWESb91DCKzvae+3k0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=broadcom.com; spf=fail smtp.mailfrom=broadcom.com; dkim=pass (1024-bit key) header.d=broadcom.com header.i=@broadcom.com header.b=GvzXSei/; arc=none smtp.client-ip=192.19.166.231 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=broadcom.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=broadcom.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=broadcom.com header.i=@broadcom.com header.b="GvzXSei/" Received: from mail-lvn-it-01.broadcom.com (mail-lvn-it-01.lvn.broadcom.net [10.36.132.253]) by relay.smtp-ext.broadcom.com (Postfix) with ESMTP id D9F8BC0004F6; Fri, 30 May 2025 16:42:48 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 relay.smtp-ext.broadcom.com D9F8BC0004F6 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com; s=dkimrelay; t=1748648569; bh=ivFnA201Da9nFI5j1NeEkgfWIjM/gXg/rK/lbw6ySqI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GvzXSei/3U9zvESWMWmxyf6eAOMk3OM3m6Ii8wyf8etN5MWubyqh+2s9dwNXkIT99 rkerslwk9K2pviObuxOeTYdsHq+/1QCF1Aiiv2Uoyr+y0XWkGem1wGyjapCuqb2txk h/iM7ocq9b7w/RSDYiBFjw3rMkeQ24QazmXaU6gA= Received: from fainelli-desktop.igp.broadcom.net (fainelli-desktop.dhcp.broadcom.net [10.67.48.245]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mail-lvn-it-01.broadcom.com (Postfix) with ESMTPSA id 6EAC118000530; Fri, 30 May 2025 16:42:18 -0700 (PDT) From: Florian Fainelli To: bcm-kernel-feedback-list@broadcom.com, Andrea della Porta , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Lorenzo Pieralisi , Krzysztof Wilczynski , Manivannan Sadhasivam , Bjorn Helgaas , Linus Walleij , Catalin Marinas , Will Deacon , Bartosz Golaszewski , Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Greg Kroah-Hartman , Saravana Kannan , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linux-gpio@vger.kernel.org, Masahiro Yamada , Stefan Wahren , Herve Codina , Luca Ceresoli , Thomas Petazzoni , Andrew Lunn , Phil Elwell , Dave Stevenson , kernel-list@raspberrypi.com, Matthias Brugger Cc: Florian Fainelli Subject: Re: [PATCH v12 11/13] arm64: defconfig: Enable RP1 misc/clock/gpio drivers Date: Fri, 30 May 2025 16:42:17 -0700 Message-ID: <20250530234218.465976-1-florian.fainelli@broadcom.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250529135052.28398-11-andrea.porta@suse.com> References: <20250529135052.28398-11-andrea.porta@suse.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Florian Fainelli On Thu, 29 May 2025 15:50:48 +0200, Andrea della Porta wrote: > Select the RP1 drivers needed to operate the PCI endpoint containing > several peripherals such as Ethernet and USB Controller. This chip is > present on RaspberryPi 5. > > Signed-off-by: Andrea della Porta > Reviewed-by: Stefan Wahren > Reviewed-by: Florian Fainelli > --- Applied to https://github.com/Broadcom/stblinux/commits/defconfig-arm64/next, thanks! -- Florian