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From: Rob Herring <robh@kernel.org>
To: George Moussalem <george.moussalem@outlook.com>
Cc: Andrew Lunn <andrew@lunn.ch>,
	Heiner Kallweit <hkallweit1@gmail.com>,
	Russell King <linux@armlinux.org.uk>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	netdev@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	linux-clk@vger.kernel.org
Subject: Re: [PATCH v3 2/5] dt-bindings: net: qca,ar803x: Add IPQ5018 Internal GE PHY support
Date: Thu, 5 Jun 2025 13:14:53 -0500	[thread overview]
Message-ID: <20250605181453.GA2946252-robh@kernel.org> (raw)
In-Reply-To: <20250602-ipq5018-ge-phy-v3-2-421337a031b2@outlook.com>

On Mon, Jun 02, 2025 at 01:53:14PM +0400, George Moussalem wrote:
> Document the IPQ5018 Internal Gigabit Ethernet PHY found in the IPQ5018
> SoC. Its output pins provide an MDI interface to either an external
> switch in a PHY to PHY link scenario or is directly attached to an RJ45
> connector.
> 
> The PHY supports 10/100/1000 mbps link modes, CDT, auto-negotiation and
> 802.3az EEE.
> 
> For operation, the LDO controller found in the IPQ5018 SoC for which
> there is provision in the mdio-4019 driver.
> 
> Two common archictures across IPQ5018 boards are:
> 1. IPQ5018 PHY --> MDI --> RJ45 connector
> 2. IPQ5018 PHY --> MDI --> External PHY
> In a phy to phy architecture, the DAC needs to be configured to
> accommodate for the short cable length. As such, add an optional boolean
> property so the driver sets preset DAC register values accordingly.
> 
> Signed-off-by: George Moussalem <george.moussalem@outlook.com>
> ---
>  .../devicetree/bindings/net/qca,ar803x.yaml        | 39 ++++++++++++++++++++++
>  1 file changed, 39 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/net/qca,ar803x.yaml b/Documentation/devicetree/bindings/net/qca,ar803x.yaml
> index 3acd09f0da863137f8a05e435a1fd28a536c2acd..fce167412896edbf49371129e3e7e87312eee051 100644
> --- a/Documentation/devicetree/bindings/net/qca,ar803x.yaml
> +++ b/Documentation/devicetree/bindings/net/qca,ar803x.yaml
> @@ -16,8 +16,32 @@ description: |
>  
>  allOf:
>    - $ref: ethernet-phy.yaml#
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - ethernet-phy-id004d.d0c0
> +
> +    then:
> +      properties:
> +        reg:
> +          const: 7  # This PHY is always at MDIO address 7 in the IPQ5018 SoC

blank line

> +        resets:
> +          items:
> +            - description:
> +                GE PHY MISC reset which triggers a reset across MDC, DSP, RX, and TX lines.

blank line

> +        qcom,dac-preset-short-cable:
> +          description:
> +            Set if this phy is connected to another phy to adjust the values for
> +            MDAC and EDAC to adjust amplitude, bias current settings, and error
> +            detection and correction algorithm to accommodate for short cable length.
> +            If not set, it is assumed the MDI output pins of this PHY are directly
> +            connected to an RJ45 connector and default DAC values will be used.
> +          type: boolean
>  
>  properties:
> +

Drop

But this schema is broken. There's no way for it to be applied to a node 
because there is no compatible defined in this schema nor a 'select'. 
You can introduce an error and see (e.g. 'qcom,dac-preset-short-cable = 
"foo";'). Really, any phy using these properties should have a specific 
compatible defined here.

>    qca,clk-out-frequency:
>      description: Clock output frequency in Hertz.
>      $ref: /schemas/types.yaml#/definitions/uint32
> @@ -132,3 +156,18 @@ examples:
>              };
>          };
>      };
> +  - |
> +    #include <dt-bindings/reset/qcom,gcc-ipq5018.h>
> +
> +    mdio {
> +        #address-cells = <1>;
> +        #size-cells = <0>;
> +
> +        /* add alias to set qcom,dac-preset-short-cable on boards that need it */
> +        ge_phy: ethernet-phy@7 {
> +            compatible = "ethernet-phy-id004d.d0c0";
> +            reg = <7>;
> +
> +            resets = <&gcc GCC_GEPHY_MISC_ARES>;
> +        };
> +    };
> 
> -- 
> 2.49.0
> 

  reply	other threads:[~2025-06-05 18:14 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-02  9:53 [PATCH v3 0/5] Add support for the IPQ5018 Internal GE PHY George Moussalem via B4 Relay
2025-06-02  9:53 ` [PATCH v3 1/5] clk: qcom: gcc-ipq5018: fix GE PHY reset George Moussalem via B4 Relay
2025-06-02  9:53 ` [PATCH v3 2/5] dt-bindings: net: qca,ar803x: Add IPQ5018 Internal GE PHY support George Moussalem via B4 Relay
2025-06-05 18:14   ` Rob Herring [this message]
2025-06-06 10:54     ` George Moussalem
2025-06-06 13:01       ` Andrew Lunn
2025-06-07  7:32         ` Russell King (Oracle)
2025-06-02  9:53 ` [PATCH v3 3/5] net: phy: qcom: at803x: Add Qualcomm IPQ5018 Internal " George Moussalem via B4 Relay
2025-06-02 12:41   ` Andrew Lunn
2025-06-02 13:02     ` George Moussalem
2025-06-02 13:49       ` Andrew Lunn
2025-06-05 18:18     ` Rob Herring
2025-06-16 11:01   ` Philipp Zabel
2025-06-16 12:38     ` George Moussalem
2025-06-02  9:53 ` [PATCH v3 4/5] arm64: dts: qcom: ipq5018: Add MDIO buses George Moussalem via B4 Relay
2025-06-02  9:53 ` [PATCH v3 5/5] arm64: dts: qcom: ipq5018: Add GE PHY to internal mdio bus George Moussalem via B4 Relay

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