From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8E92A2EACF8; Fri, 11 Jul 2025 14:52:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.132.182.106 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752245570; cv=none; b=Wor0gOpf4+a/sO3wVuVnhtQaIT44HYaEvv3Mk10h8gtiZVXRcIxQXfIkEZr3wcfKfJPPJ7kqEtUyEgApNl1c8VgDs6NofL2pqCe2qGbARylCOHe79CDuPMPYzsBV58RwdgDzLj6lmtp0eiW4TIyb63Ph8zaCp5B0mQ47fG7z7Sg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752245570; c=relaxed/simple; bh=jDxrKSVKGmymiWgFfc3XLLghQxyNU894E3heEmmTqGc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=OICoAQA7k604hVN5KBROJEBPvCtgGkwrHT604FjAJJ5qna6tBzjZxu0gGCflAjmYXLLPp9sHageb3f2uywezP6HK0wFXCzxjZLSuUwjXCc3q2s/lgHoc4TTtUFaFMaShyWw91sLa3phmesQN0Uf+kuz0NGXCGOJgwrPerX40JaA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com; spf=pass smtp.mailfrom=foss.st.com; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b=zUm3Eqtb; arc=none smtp.client-ip=185.132.182.106 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=foss.st.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b="zUm3Eqtb" Received: from pps.filterd (m0288072.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 56BEno0u026464; Fri, 11 Jul 2025 16:52:34 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= SuBSodyyqcKAz1sJaFnr1XdxWrUs+npg1uqS49q9/0Y=; b=zUm3Eqtb/608j2Xc NSBMn+1ICCJx9el4l5BnJr8HgsqU/2eCahIebmKTyzVemnDjf6eZnDPWlid14eN3 HqbWr2RVuJSdAN/MudGb45CAF5PCBAhJd7pYYZv63tX4yQvDh/l8Bj3xahOMKoBx 8uJ/KqLNW6YoCbUXDpdpeGlcBOLx7FWhtjYKTY6f988+64ksrEVgjYP55yjXhktl efEdc3gIc9Z1yfkzXw+5zSACdANGLOArpNaLa7gUYejOQ54k018hfQcM+fenmq1v DhyMvnzmVmR0COb863VJF9V4HaxlupWVC552QE5HtazAVFonDGUUfeMCB4+NidyA OUFjfw== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 47psfmyt8t-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 11 Jul 2025 16:52:34 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id D01974004C; Fri, 11 Jul 2025 16:51:19 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 1812FB56076; Fri, 11 Jul 2025 16:49:25 +0200 (CEST) Received: from localhost (10.252.16.187) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Fri, 11 Jul 2025 16:49:24 +0200 From: =?utf-8?q?Cl=C3=A9ment_Le_Goffic?= Date: Fri, 11 Jul 2025 16:49:06 +0200 Subject: [PATCH v2 14/16] arm64: dts: st: add ddrperfm on stm32mp251 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Message-ID: <20250711-ddrperfm-upstream-v2-14-cdece720348f@foss.st.com> References: <20250711-ddrperfm-upstream-v2-0-cdece720348f@foss.st.com> In-Reply-To: <20250711-ddrperfm-upstream-v2-0-cdece720348f@foss.st.com> To: Will Deacon , Mark Rutland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Philipp Zabel , Jonathan Corbet , Gatien Chevallier , Michael Turquette , Stephen Boyd , Gabriel Fernandez , Krzysztof Kozlowski , Le Goffic CC: , , , , , , , =?utf-8?q?Cl=C3=A9ment_Le_Goffic?= X-Mailer: b4 0.15-dev-7616d X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.7,FMLib:17.12.80.40 definitions=2025-07-11_03,2025-07-09_01,2025-03-28_01 The DDRPERFM is the DDR Performance Monitor embedded in STM32MP251 SoC. Keep the node disabled at SoC level as it requires the property `st,dram-type` which is provided in board dtsi file. Signed-off-by: Clément Le Goffic --- arch/arm64/boot/dts/st/stm32mp251.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi index 0683c2d5cb6f..7f138324610a 100644 --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi @@ -1577,5 +1577,12 @@ exti2: interrupt-controller@46230000 { <0>, <&intc GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>; /* EXTI_70 */ }; + + ddrperfm: perf@48041000 { + compatible = "st,stm32mp251-ddr-pmu"; + reg = <0x48041000 0x400>; + access-controllers = <&rcc 104>; + status = "disabled"; + }; }; }; -- 2.43.0