From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 012D22EAB9F; Fri, 11 Jul 2025 14:52:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.207.212.93 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752245563; cv=none; b=VSJI3uGZwnqFSr2gYQ0mmUPr9pNC7BZZYZFwIMU9ERuZd1kZrgt2v1Lr7mMtAwsEkp446TeGR+wyUCA7n+fsqFjy4IG+/2mDrb7LQbFrDxyB9FO8e6oHcBj2IYdCFgxclmDv0U70aSPCYWere1p9DpN4bUPhDcyM32rLUgqoN4I= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752245563; c=relaxed/simple; bh=APnITFI2OlF73fYQnE5tGk6hf/PmhIgfi1CHjJJSw1M=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=BzNZAqH74FNi9em3xOiSHc+8XujvPIyNi+QJaQSC0Z/H57TOx7np9wtO6bTSZodZgg7TrqxWhr8S2incIIOtrLAfTU34Qh4H9gecqwX2L8FskqsCypg7gn7KOhrVgc9u2q5WDDHuivZKJrUAO4JwrsKsmB2BaLBs++BatMX/eiI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com; spf=pass smtp.mailfrom=foss.st.com; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b=8Hd9VdV8; arc=none smtp.client-ip=91.207.212.93 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=foss.st.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b="8Hd9VdV8" Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 56BBCecB004273; Fri, 11 Jul 2025 16:52:28 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= UlvgFLkq2jemy3eeMnwVN+pbz6Mlls5h0vESyT1iEYI=; b=8Hd9VdV8ctD+bDJz 0gNvrZDTZWQAZN80szPcIQP6ybDSN4IS75EBq4IhYKctMGGpLhsuBzr9XTcdXW9e hr619bgFvR/CkHrwnuMfTtfrCyZhY7Iiad5BdIYBorIuiQEBbgAxRi8Vq9OhA+VJ dc3/0V4W7B7i81ODN3gRNUYW61B0gdlvu9D6z+jvDcN6rwFcx4G9uYyR0trjZUek UV4KsPru/r/bcHOOEfXzRD3oVupugbTg69RlOmui04lBYKGyNnNAPmsxtc/g/GpD FdZJENHqIbn4E4X0ka+RPdbQsLksuBdbAKGoUIWeKQ0sLuW3fNLq507efx0u9lE6 hlAWNw== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 47ptxjpwyw-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 11 Jul 2025 16:52:27 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id D00E84004B; Fri, 11 Jul 2025 16:51:19 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 083DBB56890; Fri, 11 Jul 2025 16:49:26 +0200 (CEST) Received: from localhost (10.252.16.187) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Fri, 11 Jul 2025 16:49:25 +0200 From: =?utf-8?q?Cl=C3=A9ment_Le_Goffic?= Date: Fri, 11 Jul 2025 16:49:07 +0200 Subject: [PATCH v2 15/16] arm64: dts: st: support ddrperfm on stm32mp257f-dk Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Message-ID: <20250711-ddrperfm-upstream-v2-15-cdece720348f@foss.st.com> References: <20250711-ddrperfm-upstream-v2-0-cdece720348f@foss.st.com> In-Reply-To: <20250711-ddrperfm-upstream-v2-0-cdece720348f@foss.st.com> To: Will Deacon , Mark Rutland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Philipp Zabel , Jonathan Corbet , Gatien Chevallier , Michael Turquette , Stephen Boyd , Gabriel Fernandez , Krzysztof Kozlowski , Le Goffic CC: , , , , , , , =?utf-8?q?Cl=C3=A9ment_Le_Goffic?= X-Mailer: b4 0.15-dev-7616d X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.7,FMLib:17.12.80.40 definitions=2025-07-11_03,2025-07-09_01,2025-03-28_01 Configure DDRPERFM node on stm32mp257f-dk board. Disable the node as DDRPERFM will produce an error message if it's clock (shared with the DDRCTRL on STM32MP25x) is secured by common bootloaders. Signed-off-by: Clément Le Goffic --- arch/arm64/boot/dts/st/stm32mp257f-dk.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp257f-dk.dts b/arch/arm64/boot/dts/st/stm32mp257f-dk.dts index a97b41f14ecc..d236ebf2bb10 100644 --- a/arch/arm64/boot/dts/st/stm32mp257f-dk.dts +++ b/arch/arm64/boot/dts/st/stm32mp257f-dk.dts @@ -84,6 +84,11 @@ &arm_wdt { status = "okay"; }; +&ddrperfm { + memory-channel = <&lpddr_channel>; + status = "disabled"; +}; + &scmi_regu { scmi_vddio1: regulator@0 { regulator-min-microvolt = <1800000>; -- 2.43.0