From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 378EF2EACF8; Fri, 11 Jul 2025 14:52:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.132.182.106 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752245564; cv=none; b=jmlr8sVIi4MUPmlN5Da/QBJOQl8TxQ+XoWBgvitccIShNC7uamuKTHXrsCt8xadt2yRCrpVuuJ9HaMEkvxsnWtNadoVShTjbGouF6CSpOYNhCWHkIvUC/e1tv6yFNFFsY2mlnnvSELZ8q8IWtUDxGeIIL1euq5yhUg76V+Domy4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752245564; c=relaxed/simple; bh=q/FVeQueIyKVrnp1NcfhHAttXLTMCRvWb2aBdG6Nx4o=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=uT8z//fcLfjR8aAyMtoioqmkFhQ7c43JNvIV4PpV5FTV3n5b1q3UCv1wtTRIkS/uucsqhKwebeg+dsPQL6ZuaE3WV7EdmhEnZFlc36iInv+3ohbOtAUFI/1zkmiiG2epdkbHEl6b4su2QFDTEjoPwBxVVTuZpwaRbVjlTATU+Vs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com; spf=pass smtp.mailfrom=foss.st.com; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b=GLwIa/U4; arc=none smtp.client-ip=185.132.182.106 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=foss.st.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b="GLwIa/U4" Received: from pps.filterd (m0241204.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 56BEHQjM027785; Fri, 11 Jul 2025 16:52:28 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= F0RaanQr/Y01Kr3e9l6yvosGEYhnzl8fsIwEj1CuG6c=; b=GLwIa/U4Pms3zJYJ Vf6J02Gisg1Ta4puNDbzsRHGlPFLIH6DIxCks5O8Xa1cKnjO0hXVB7a4cISVoN1n q8zYShB0re5FueScRBFZN1aQ5rdOfisRaiYktnzX+qK0abR4UCG1yuGbZJOtEV9I X5W6esz3NDy1OWP4hO6pJLsQfdKxn9BMlNqA/DvYXUBaXY2zfZ+zVPtaL9SuiKU7 vgVx68hnzZUh5nbPyAhp5JPDt/IqI60gLjHi771kfkVnqRYSMjndzDKt1UYCrx0G 6XYxO8IrkeXgCrx0NygjkS++agXq9iYTFatMUGSRUdVHpvE/JGMMdIikmZN92LaN t8o0ag== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 47pud3qfjm-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 11 Jul 2025 16:52:28 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id B7B5C4004D; Fri, 11 Jul 2025 16:51:21 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id E9575B56893; Fri, 11 Jul 2025 16:49:26 +0200 (CEST) Received: from localhost (10.252.16.187) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Fri, 11 Jul 2025 16:49:26 +0200 From: =?utf-8?q?Cl=C3=A9ment_Le_Goffic?= Date: Fri, 11 Jul 2025 16:49:08 +0200 Subject: [PATCH v2 16/16] arm64: dts: st: support ddrperfm on stm32mp257f-ev1 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Message-ID: <20250711-ddrperfm-upstream-v2-16-cdece720348f@foss.st.com> References: <20250711-ddrperfm-upstream-v2-0-cdece720348f@foss.st.com> In-Reply-To: <20250711-ddrperfm-upstream-v2-0-cdece720348f@foss.st.com> To: Will Deacon , Mark Rutland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Philipp Zabel , Jonathan Corbet , Gatien Chevallier , Michael Turquette , Stephen Boyd , Gabriel Fernandez , Krzysztof Kozlowski , Le Goffic CC: , , , , , , , =?utf-8?q?Cl=C3=A9ment_Le_Goffic?= X-Mailer: b4 0.15-dev-7616d X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.7,FMLib:17.12.80.40 definitions=2025-07-11_03,2025-07-09_01,2025-03-28_01 Configure DDRPERFM node on stm32mp257f-ev1 board. Disable the node as DDRPERFM will produce an error message if it's clock (shared with the DDRCTRL on STM32MP25x) is secured by common bootloaders. Signed-off-by: Clément Le Goffic --- arch/arm64/boot/dts/st/stm32mp257f-ev1.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts index f987d86d350f..7533b500135c 100644 --- a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts +++ b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts @@ -128,6 +128,11 @@ csi_source: endpoint { }; }; +&ddrperfm { + memory-channel = <&ddr_channel>; + status = "disabled"; +}; + &dcmipp { status = "okay"; port { -- 2.43.0