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From: "Clément Le Goffic" <clement.legoffic@foss.st.com>
To: Will Deacon <will@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Alexandre Torgue <alexandre.torgue@foss.st.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Jonathan Corbet <corbet@lwn.net>,
	Gatien Chevallier <gatien.chevallier@foss.st.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Gabriel Fernandez <gabriel.fernandez@foss.st.com>,
	Krzysztof Kozlowski <krzk@kernel.org>,
	Le Goffic <legoffic.clement@gmail.com>,
	Julius Werner <jwerner@chromium.org>
Cc: linux-arm-kernel@lists.infradead.org,
	linux-perf-users@vger.kernel.org, devicetree@vger.kernel.org,
	linux-stm32@st-md-mailman.stormreply.com,
	linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
	linux-clk@vger.kernel.org,
	"Clément Le Goffic" <clement.legoffic@foss.st.com>
Subject: [PATCH v5 02/20] dt-bindings: stm32: stm32mp25: add `#access-controller-cells` property
Date: Mon, 28 Jul 2025 17:29:33 +0200	[thread overview]
Message-ID: <20250728-ddrperfm-upstream-v5-2-03f1be8ad396@foss.st.com> (raw)
In-Reply-To: <20250728-ddrperfm-upstream-v5-0-03f1be8ad396@foss.st.com>

RCC is able to check the availability of a clock.
Allow to query the RCC with a firewall ID.

Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
---
 Documentation/devicetree/bindings/clock/st,stm32mp25-rcc.yaml | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/Documentation/devicetree/bindings/clock/st,stm32mp25-rcc.yaml b/Documentation/devicetree/bindings/clock/st,stm32mp25-rcc.yaml
index 88e52f10d1ec..4d471e3d89bc 100644
--- a/Documentation/devicetree/bindings/clock/st,stm32mp25-rcc.yaml
+++ b/Documentation/devicetree/bindings/clock/st,stm32mp25-rcc.yaml
@@ -31,6 +31,11 @@ properties:
   '#reset-cells':
     const: 1
 
+  '#access-controller-cells':
+    const: 1
+    description:
+      Contains the firewall ID associated to the peripheral.
+
   clocks:
     items:
       - description: CK_SCMI_HSE High Speed External oscillator (8 to 48 MHz)
@@ -123,6 +128,7 @@ required:
   - reg
   - '#clock-cells'
   - '#reset-cells'
+  - '#access-controller-cells'
   - clocks
 
 additionalProperties: false
@@ -136,6 +142,7 @@ examples:
         reg = <0x44200000 0x10000>;
         #clock-cells = <1>;
         #reset-cells = <1>;
+        #access-controller-cells = <1>;
         clocks =  <&scmi_clk CK_SCMI_HSE>,
                   <&scmi_clk CK_SCMI_HSI>,
                   <&scmi_clk CK_SCMI_MSI>,

-- 
2.43.0


  parent reply	other threads:[~2025-07-28 15:33 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-28 15:29 [PATCH v5 00/20] Introduce STM32 DDR PMU for STM32MP platforms Clément Le Goffic
2025-07-28 15:29 ` [PATCH v5 01/20] bus: firewall: move stm32_firewall header file in include folder Clément Le Goffic
2025-07-28 15:29 ` Clément Le Goffic [this message]
2025-07-31 13:50   ` [PATCH v5 02/20] dt-bindings: stm32: stm32mp25: add `#access-controller-cells` property Rob Herring (Arm)
2025-07-28 15:29 ` [PATCH v5 03/20] clk: stm32mp25: add firewall grant_access ops Clément Le Goffic
2025-07-28 15:29 ` [PATCH v5 04/20] arm64: dts: st: set rcc as an access-controller Clément Le Goffic
2025-07-28 15:29 ` [PATCH v5 05/20] dt-bindings: memory: factorise LPDDR props into SDRAM props Clément Le Goffic
2025-07-30 18:27   ` Julius Werner
2025-08-14 14:06     ` Clément Le Goffic
2025-07-28 15:29 ` [PATCH v5 06/20] dt-bindings: memory: introduce DDR4 Clément Le Goffic
2025-07-30 18:29   ` Julius Werner
2025-08-14 14:40     ` Clément Le Goffic
2025-07-30 21:11   ` Rob Herring
2025-08-14 14:42     ` Clément Le Goffic
2025-08-17  7:19       ` Krzysztof Kozlowski
2025-08-22 13:59         ` Clément Le Goffic
2025-07-28 15:29 ` [PATCH v5 07/20] dt-bindings: memory: factorise LPDDR channel binding into SDRAM channel Clément Le Goffic
2025-07-31 13:52   ` Rob Herring (Arm)
2025-07-28 15:29 ` [PATCH v5 08/20] dt-binding: memory: add DDR4 channel compatible Clément Le Goffic
2025-07-31 13:52   ` Rob Herring (Arm)
2025-07-28 15:29 ` [PATCH v5 09/20] dt-bindings: memory: SDRAM channel: standardise node name Clément Le Goffic
2025-07-31 13:53   ` Rob Herring (Arm)
2025-07-28 15:29 ` [PATCH v5 10/20] arm64: dts: st: add LPDDR channel to stm32mp257f-dk board Clément Le Goffic
2025-07-28 15:29 ` [PATCH v5 11/20] arm64: dts: st: add DDR channel to stm32mp257f-ev1 board Clément Le Goffic
2025-07-28 15:29 ` [PATCH v5 12/20] dt-bindings: perf: stm32: introduce DDRPERFM dt-bindings Clément Le Goffic
2025-07-31 13:54   ` Rob Herring
2025-07-28 15:29 ` [PATCH v5 13/20] perf: stm32: introduce DDRPERFM driver Clément Le Goffic
2025-07-30 14:43   ` kernel test robot
2025-07-28 15:29 ` [PATCH v5 14/20] Documentation: perf: stm32: add ddrperfm support Clément Le Goffic
2025-07-28 15:29 ` [PATCH v5 15/20] MAINTAINERS: add myself as STM32 DDR PMU maintainer Clément Le Goffic
2025-07-28 15:29 ` [PATCH v5 16/20] ARM: dts: stm32: add ddrperfm on stm32mp131 Clément Le Goffic
2025-07-28 15:29 ` [PATCH v5 17/20] ARM: dts: stm32: add ddrperfm on stm32mp151 Clément Le Goffic
2025-07-28 15:29 ` [PATCH v5 18/20] arm64: dts: st: add ddrperfm on stm32mp251 Clément Le Goffic
2025-07-28 15:29 ` [PATCH v5 19/20] arm64: dts: st: support ddrperfm on stm32mp257f-dk Clément Le Goffic
2025-07-28 15:29 ` [PATCH v5 20/20] arm64: dts: st: support ddrperfm on stm32mp257f-ev1 Clément Le Goffic

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