Re: [PATCH v5 1/2] dt-bindings: clock: eswin: Documentation for eic7700 SoC

[Conor Dooley <conor@kernel.org>]

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On Tue, Sep 23, 2025 at 04:47:39PM +0800, dongxuyang@eswincomputing.com wrote:
> From: Xuyang Dong <dongxuyang@eswincomputing.com>
> 
> Add device tree binding documentation for the ESWIN eic7700
> clock controller module.
> 
> Signed-off-by: Yifeng Huang <huangyifeng@eswincomputing.com>
> Signed-off-by: Xuyang Dong <dongxuyang@eswincomputing.com>
> ---
>  .../bindings/clock/eswin,eic7700-clock.yaml   |  40 ++
>  .../dt-bindings/clock/eswin,eic7700-clock.h   | 379 ++++++++++++++++++
>  2 files changed, 419 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/eswin,eic7700-clock.yaml
>  create mode 100644 include/dt-bindings/clock/eswin,eic7700-clock.h
> 
> diff --git a/Documentation/devicetree/bindings/clock/eswin,eic7700-clock.yaml b/Documentation/devicetree/bindings/clock/eswin,eic7700-clock.yaml
> new file mode 100644
> index 000000000000..49053543ecfe
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/eswin,eic7700-clock.yaml
> @@ -0,0 +1,40 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/eswin,eic7700-clock.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Eswin EIC7700 SoC clock controller
> +
> +maintainers:
> +  - Yifeng Huang <huangyifeng@eswincomputing.com>
> +  - Xuyang Dong <dongxuyang@eswincomputing.com>
> +
> +description:
> +  The clock controller generates and supplies clock to all the modules
> +  for eic7700 SoC.
> +
> +properties:
> +  compatible:
> +    const: eswin,eic7700-clock
> +
> +  reg:
> +    maxItems: 1
> +
> +  '#clock-cells':
> +    const: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - '#clock-cells'
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    clock-controller@51828000 {
> +        compatible = "eswin,eic7700-clock";
> +        reg = <0x51828000 0x200>;
> +        #clock-cells = <1>;
> +    };

No clock input to this block? Surprised there's not some off-chip
oscillator that provides a quality reference for the internal PLLs etc.

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