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From: Conor Dooley <conor@kernel.org>
To: zhangqing <zhangqing@rock-chips.com>
Cc: mturquette@baylibre.com, sboyd@kernel.org,
	sugar.zhang@rock-chips.com, heiko@sntech.de, robh@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-clk@vger.kernel.org, linux-rockchip@lists.infradead.org,
	linux-kernel@vger.kernel.org, huangtao@rock-chips.com,
	finley.xiao@rock-chips.com
Subject: Re: [PATCH v5 6/7] dt-bindings: clock: rockchip: Add RK3506 clock and reset unit
Date: Tue, 4 Nov 2025 17:24:45 +0000	[thread overview]
Message-ID: <20251104-nutty-lunchroom-36a5879db0b9@spud> (raw)
In-Reply-To: <6ff7370e-0e57-487d-a6d9-05958ab21e98@rock-chips.com>

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On Tue, Nov 04, 2025 at 09:48:56AM +0800, zhangqing wrote:
> 
> 在 2025/10/28 0:47, Conor Dooley 写道:
> > On Mon, Oct 27, 2025 at 04:41:46PM +0800, Elaine Zhang wrote:
> > > From: Finley Xiao<finley.xiao@rock-chips.com>
> > > 
> > > Add device tree bindings for clock and reset unit on RK3506 SoC.
> > > Add clock and reset IDs for RK3506 SoC.
> > > 
> > > Signed-off-by: Finley Xiao<finley.xiao@rock-chips.com>
> > > ---
> > >   .../bindings/clock/rockchip,rk3506-cru.yaml   |  51 ++++
> > >   .../dt-bindings/clock/rockchip,rk3506-cru.h   | 285 ++++++++++++++++++
> > >   .../dt-bindings/reset/rockchip,rk3506-cru.h   | 211 +++++++++++++
> > >   3 files changed, 547 insertions(+)
> > >   create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3506-cru.yaml
> > >   create mode 100644 include/dt-bindings/clock/rockchip,rk3506-cru.h
> > >   create mode 100644 include/dt-bindings/reset/rockchip,rk3506-cru.h
> > > 
> > > diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3506-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3506-cru.yaml
> > > new file mode 100644
> > > index 000000000000..ecb5fa497747
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3506-cru.yaml
> > > @@ -0,0 +1,51 @@
> > > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> > > +%YAML 1.2
> > > +---
> > > +$id:http://devicetree.org/schemas/clock/rockchip,rk3506-cru.yaml#
> > > +$schema:http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: Rockchip RK3506 Clock and Reset Unit (CRU)
> > > +
> > > +maintainers:
> > > +  - Finley Xiao<finley.xiao@rock-chips.com>
> > > +  - Heiko Stuebner<heiko@sntech.de>
> > > +
> > > +description: |
> > > +  The RK3506 CRU generates the clock and also implements reset for SoC
> > > +  peripherals.
> > > +
> > > +properties:
> > > +  compatible:
> > > +    const: rockchip,rk3506-cru
> > > +
> > > +  reg:
> > > +    maxItems: 1
> > > +
> > > +  "#clock-cells":
> > > +    const: 1
> > > +
> > > +  "#reset-cells":
> > > +    const: 1
> > > +
> > > +  clocks:
> > > +    maxItems: 1
> > Can you explain somewhere why the input clock is not required?
> > Feels like it really should be required, if it is what the output clocks
> > are generated from, but I can also see why it might be optional either.
> > pw-bot: changes-requested
> 
> Our default hardware input clock is 24M.
> 
>  Some Socs and hardware input clocks support 24M、24.576M、26M. For

Other SoCs get other compatibles, so that is not relevant.

> different input frequencies, there is a need to configure clocks.

That seems like it should be required, because there's always one being
provided.

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  parent reply	other threads:[~2025-11-04 17:24 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-27  8:41 [PATCH v5 0/7] clk: rockchip: Add clock controller for the Elaine Zhang
2025-10-27  8:41 ` [PATCH v5 1/7] clk: rockchip: Implement rockchip_clk_register_armclk_multi_pll() Elaine Zhang
2025-10-27  8:41 ` [PATCH v5 2/7] dt-bindings: clock, reset: Add support for rv1126b Elaine Zhang
2025-10-27  8:41 ` [PATCH v5 3/7] clk: rockchip: Add clock controller for the RV1126B Elaine Zhang
2025-10-27  8:41 ` [PATCH v5 4/7] dt-bindings: clock: Add support for rockchip pvtpll Elaine Zhang
2025-10-28  7:52   ` Krzysztof Kozlowski
2025-10-27  8:41 ` [PATCH v5 5/7] clk: rockchip: add support for pvtpll clk Elaine Zhang
2025-10-27  8:41 ` [PATCH v5 6/7] dt-bindings: clock: rockchip: Add RK3506 clock and reset unit Elaine Zhang
2025-10-27 16:47   ` Conor Dooley
     [not found]     ` <6ff7370e-0e57-487d-a6d9-05958ab21e98@rock-chips.com>
2025-11-04 17:24       ` Conor Dooley [this message]
2025-10-30 13:55   ` Jonas Karlman
2025-11-07  1:24     ` zhangqing
2025-11-07  1:44     ` zhangqing
2025-10-27  8:41 ` [PATCH v5 7/7] clk: rockchip: Add clock and reset driver for RK3506 Elaine Zhang

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