From: kernel test robot <lkp@intel.com>
To: Yu-Chun Lin <eleanor.lin@realtek.com>,
mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, p.zabel@pengutronix.de,
cylee12@realtek.com, jyanchou@realtek.com
Cc: oe-kbuild-all@lists.linux.dev, devicetree@vger.kernel.org,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
james.tai@realtek.com, cy.huang@realtek.com,
stanley_chang@realtek.com, eleanor.lin@realtek.com
Subject: Re: [PATCH 4/9] clk: realtek: Add support for phase locked loops (PLLs)
Date: Wed, 31 Dec 2025 04:18:07 +0800 [thread overview]
Message-ID: <202512310333.lXVsAtZ9-lkp@intel.com> (raw)
In-Reply-To: <20251229075313.27254-5-eleanor.lin@realtek.com>
Hi Yu-Chun,
kernel test robot noticed the following build errors:
[auto build test ERROR on clk/clk-next]
[also build test ERROR on linus/master v6.19-rc3 next-20251219]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Yu-Chun-Lin/dt-bindings-clock-Add-Realtek-RTD1625-Clock-Reset-Controller/20251229-155549
base: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
patch link: https://lore.kernel.org/r/20251229075313.27254-5-eleanor.lin%40realtek.com
patch subject: [PATCH 4/9] clk: realtek: Add support for phase locked loops (PLLs)
config: i386-buildonly-randconfig-001-20251230 (https://download.01.org/0day-ci/archive/20251231/202512310333.lXVsAtZ9-lkp@intel.com/config)
compiler: gcc-14 (Debian 14.2.0-19) 14.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251231/202512310333.lXVsAtZ9-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202512310333.lXVsAtZ9-lkp@intel.com/
All errors (new ones prefixed by >>):
>> ld: drivers/clk/realtek/clk-pll.o:(.rodata+0x80): multiple definition of `clk_pll_ops'; drivers/clk/qcom/clk-pll.o:(.rodata+0x100): first defined here
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
next prev parent reply other threads:[~2025-12-30 20:18 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-29 7:53 [PATCH 0/9] clk: realtek: Add RTD1625 Clock Support Yu-Chun Lin
2025-12-29 7:53 ` [PATCH 1/9] dt-bindings: clock: Add Realtek RTD1625 Clock & Reset Controller Yu-Chun Lin
2025-12-30 12:11 ` Krzysztof Kozlowski
2026-01-02 5:46 ` Yu-Chun Lin [林祐君]
2025-12-29 7:53 ` [PATCH 2/9] clk: realtek: Add basic reset support Yu-Chun Lin
2025-12-30 12:20 ` Krzysztof Kozlowski
2026-01-02 5:56 ` Yu-Chun Lin [林祐君]
2025-12-29 7:53 ` [PATCH 3/9] clk: realtek: Introduce a common probe() Yu-Chun Lin
2025-12-30 12:17 ` Krzysztof Kozlowski
2025-12-30 18:03 ` kernel test robot
2025-12-30 18:14 ` kernel test robot
2025-12-29 7:53 ` [PATCH 4/9] clk: realtek: Add support for phase locked loops (PLLs) Yu-Chun Lin
2025-12-30 20:18 ` kernel test robot [this message]
2025-12-29 7:53 ` [PATCH 5/9] clk: realtek: Add support for gate clock Yu-Chun Lin
2025-12-29 7:53 ` [PATCH 6/9] clk: realtek: Add support for mux clock Yu-Chun Lin
2026-01-05 12:04 ` Dan Carpenter
2025-12-29 7:53 ` [PATCH 7/9] clk: realtek: Add support for MMC-tuned PLL clocks Yu-Chun Lin
2025-12-29 7:53 ` [PATCH 8/9] clk: realtek: Add RTD1625-CRT clock controller driver Yu-Chun Lin
2025-12-30 12:15 ` Krzysztof Kozlowski
2025-12-29 7:53 ` [PATCH 9/9] clk: realtek: Add RTD1625-ISO " Yu-Chun Lin
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