Linux clock framework development
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From: Maxime Ripard <mripard@kernel.org>
To: Brian Masney <bmasney@redhat.com>
Cc: Michael Turquette <mturquette@baylibre.com>,
	 Stephen Boyd <sboyd@kernel.org>, Alberto Ruiz <aruiz@redhat.com>,
	linux-clk@vger.kernel.org,  linux-kernel@vger.kernel.org
Subject: Re: [PATCH v6 2/7] clk: test: introduce test suite for sibling rate changes on a divider
Date: Fri, 20 Mar 2026 15:29:06 +0100	[thread overview]
Message-ID: <20260320-sticky-overjoyed-pheasant-9bb63c@houat> (raw)
In-Reply-To: <CABx5tqKPyQeT6eD8n1DVGLWpjHPq8_x6xfeMB_acZW4sAbp1WQ@mail.gmail.com>

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On Fri, Mar 20, 2026 at 09:08:29AM -0400, Brian Masney wrote:
> On Fri, Mar 20, 2026 at 9:03 AM Maxime Ripard <mripard@kernel.org> wrote:
> > On Thu, Mar 19, 2026 at 07:08:07AM -0400, Brian Masney wrote:
> > > On Thu, Mar 19, 2026 at 5:10 AM Maxime Ripard <mripard@kernel.org> wrote:
> > > > On Fri, Mar 13, 2026 at 12:43:09PM -0400, Brian Masney wrote:
> > > > Anyway, what I'm trying to say at least is that, at least, we shouldn't
> > > > frame it as a guarantee the framework provides, because it's really not
> > > > the case.
> > >
> > > I see what you are saying, however these are divider tests, and this
> > > is the way that clk-divider works.
> >
> > Yes, this is an undocumented behaviour of *clk-divider*. clk-divider is
> > not the only divider implementation. If anything, it's the reference
> > implementation, but that's pretty much it.
> >
> > So when you say:
> >
> > > +/*
> > > + * Test that, for a parent with two divider-only children with CLK_SET_RATE_PARENT set
> > > + * and one requests a rate compatible with the existing parent rate, the parent and
> > > + * sibling rates are not affected.
> > > + */
> >
> > And
> >
> > > I want to demonstrate that the clk core is being called, and that
> > > ultimately the correct dividers are computed.
> >
> > This is only true for one implementation, and so far has been considered
> > an implementation detail. It's not something you can generalize.
> >
> > And to make my point clearer, I wasn't saying this test shouldn't be
> > there, I was saying we shouldn't do and document that generalization.
> >
> > > For example, on patch 7 of this series:
> > >
> > > - Parent, child1 and child2 all start out at 24 MHz.
> > > - child1 requests 32 MHz.
> > > - Parent is changed to 96 MHz, child1 at 32 MHz, child2 stays at 24 MHz.
> > >
> > > Child2 keeps the same rate, however the tests show that the clk is
> > > actually updated since the divider is changed from 1 to 4 after this
> > > operation. This is to simulate what would be programmed into a
> > > register for real hardware.
> > >
> > > I can drop the expects for the dividers if you really want in the next
> > > version. Personally, I see value since these are divider-specific
> > > tests.
> >
> > Not really, these tests are clk-divider tests, nothing more.
> 
> OK, I'll drop the checks for the actual dividers in the next version.

It really wasn't the point I was trying to make. It's fine to have that
test as a clk-divider test, but we should document it as just that,
nothing more.

Maxime

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  reply	other threads:[~2026-03-20 14:29 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-13 16:43 [PATCH v6 0/7] clk: add support for v1 / v2 clock rate negotiation and kunit tests Brian Masney
2026-03-13 16:43 ` [PATCH v6 1/7] clk: test: introduce clk_dummy_div for a mock divider Brian Masney
2026-03-16 12:09   ` Maxime Ripard
2026-03-13 16:43 ` [PATCH v6 2/7] clk: test: introduce test suite for sibling rate changes on a divider Brian Masney
2026-03-19  9:10   ` Maxime Ripard
2026-03-19 11:08     ` Brian Masney
2026-03-20 13:03       ` Maxime Ripard
2026-03-20 13:08         ` Brian Masney
2026-03-20 14:29           ` Maxime Ripard [this message]
2026-03-20 14:34             ` Brian Masney
2026-03-13 16:43 ` [PATCH v6 3/7] clk: introduce new helper clk_hw_get_children_lcm() to calculate LCM of all child rates Brian Masney
2026-03-19  9:16   ` Maxime Ripard
2026-03-13 16:43 ` [PATCH v6 4/7] clk: test: introduce additional test case showing sibling clock rate change Brian Masney
2026-03-19  9:22   ` Maxime Ripard
2026-03-19 15:14     ` Brian Masney
2026-03-13 16:43 ` [PATCH v6 5/7] clk: introduce new flag CLK_V2_RATE_NEGOTIATION for sensitive clocks Brian Masney
2026-03-19  9:35   ` Maxime Ripard
2026-03-19 10:35     ` Brian Masney
2026-03-20 14:31       ` Maxime Ripard
2026-03-20 14:33         ` Maxime Ripard
2026-03-20 14:44           ` Brian Masney
2026-03-13 16:43 ` [PATCH v6 6/7] clk: divider: enable optional support for v2 rate negotiation Brian Masney
2026-03-19  9:36   ` Maxime Ripard
2026-03-13 16:43 ` [PATCH v6 7/7] clk: test: introduce additional test case showing v2 rate change + LCM parent Brian Masney
2026-03-19  9:43   ` Maxime Ripard
2026-03-19 11:09     ` Brian Masney

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