Linux clock framework development
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From: Yu-Chun Lin <eleanor.lin@realtek.com>
To: <mturquette@baylibre.com>, <sboyd@kernel.org>, <robh@kernel.org>,
	<krzk+dt@kernel.org>, <conor+dt@kernel.org>,
	<p.zabel@pengutronix.de>, <cylee12@realtek.com>,
	<afaerber@suse.com>, <jyanchou@realtek.com>
Cc: <devicetree@vger.kernel.org>, <linux-clk@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-realtek-soc@lists.infradead.org>, <james.tai@realtek.com>,
	<cy.huang@realtek.com>, <stanley_chang@realtek.com>,
	<eleanor.lin@realtek.com>, <bmasney@redhat.com>
Subject: [PATCH v7 10/10] arm64: dts: realtek: Add clock support for RTD1625
Date: Fri, 8 May 2026 19:16:41 +0800	[thread overview]
Message-ID: <20260508111641.3192177-11-eleanor.lin@realtek.com> (raw)
In-Reply-To: <20260508111641.3192177-1-eleanor.lin@realtek.com>

Add the clock controller nodes and osc27m fixed clock for the
Realtek RTD1625 SoC.

Signed-off-by: Yu-Chun Lin <eleanor.lin@realtek.com>
---
 arch/arm64/boot/dts/realtek/kent.dtsi | 33 +++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/arch/arm64/boot/dts/realtek/kent.dtsi b/arch/arm64/boot/dts/realtek/kent.dtsi
index ae006ce24420..4722337a143d 100644
--- a/arch/arm64/boot/dts/realtek/kent.dtsi
+++ b/arch/arm64/boot/dts/realtek/kent.dtsi
@@ -26,6 +26,15 @@ timer {
 			     <GIC_PPI  9 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
+	clocks {
+		osc27m: osc {
+			compatible = "fixed-clock";
+			clock-frequency = <27000000>;
+			clock-output-names = "osc27m";
+			#clock-cells = <0>;
+		};
+	};
+
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
@@ -141,6 +150,14 @@ rbus: bus@98000000 {
 			#address-cells = <1>;
 			#size-cells = <1>;
 
+			cc: clock-controller@0 {
+				compatible = "realtek,rtd1625-crt-clk";
+				reg = <0x0 0x900>;
+				clocks = <&osc27m>;
+				#clock-cells = <1>;
+				#reset-cells = <1>;
+			};
+
 			uart0: serial@7800 {
 				compatible = "snps,dw-apb-uart";
 				reg = <0x7800 0x100>;
@@ -150,6 +167,22 @@ uart0: serial@7800 {
 				reg-shift = <2>;
 				status = "disabled";
 			};
+
+			ic: clock-controller@7088 {
+				compatible = "realtek,rtd1625-iso-clk";
+				reg = <0x7088 0x8>;
+				clocks = <&osc27m>;
+				#clock-cells = <1>;
+				#reset-cells = <1>;
+			};
+
+			iso_s_cc: clock-controller@146310 {
+				compatible = "realtek,rtd1625-iso-s-clk";
+				reg = <0x146310 0x8>;
+				clocks = <&osc27m>;
+				#clock-cells = <1>;
+				#reset-cells = <1>;
+			};
 		};
 
 		gic: interrupt-controller@ff100000 {
-- 
2.34.1


      parent reply	other threads:[~2026-05-08 11:18 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-08 11:16 [PATCH v7 00/10] clk: realtek: Add RTD1625 clock support Yu-Chun Lin
2026-05-08 11:16 ` [PATCH v7 01/10] dt-bindings: clock: Add Realtek RTD1625 Clock & Reset Controller Yu-Chun Lin
2026-05-08 11:16 ` [PATCH v7 02/10] reset: Add Realtek basic reset support Yu-Chun Lin
2026-05-08 11:16 ` [PATCH v7 03/10] clk: realtek: Introduce a common probe() Yu-Chun Lin
2026-05-08 11:16 ` [PATCH v7 04/10] clk: realtek: Add support for phase locked loops (PLLs) Yu-Chun Lin
2026-05-08 11:16 ` [PATCH v7 05/10] clk: realtek: Add support for gate clock Yu-Chun Lin
2026-05-08 11:16 ` [PATCH v7 06/10] clk: realtek: Add support for mux clock Yu-Chun Lin
2026-05-08 11:16 ` [PATCH v7 07/10] clk: realtek: Add support for MMC-tuned PLL clocks Yu-Chun Lin
2026-05-08 11:16 ` [PATCH v7 08/10] clk: realtek: Add RTD1625-CRT clock controller driver Yu-Chun Lin
2026-05-08 11:16 ` [PATCH v7 09/10] clk: realtek: Add RTD1625-ISO " Yu-Chun Lin
2026-05-08 11:16 ` Yu-Chun Lin [this message]

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