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Sun, 10 May 2026 20:23:10 -0700 (PDT) Received: from ryzen ([2601:644:8000:5b5d:7285:c2ff:fe45:8a32]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2baf1e35bcfsm83911855ad.38.2026.05.10.20.23.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 10 May 2026 20:23:09 -0700 (PDT) From: Rosen Penev To: linux-clk@vger.kernel.org Cc: Michael Turquette , Stephen Boyd , Brian Masney , Heiko Stuebner , linux-arm-kernel@lists.infradead.org (moderated list:ARM/Rockchip SoC support), linux-rockchip@lists.infradead.org (open list:ARM/Rockchip SoC support), linux-kernel@vger.kernel.org (open list) Subject: [PATCH] clk: rockchip: Use flexible array for clock table Date: Sun, 10 May 2026 20:22:52 -0700 Message-ID: <20260511032252.361906-1-rosenp@gmail.com> X-Mailer: git-send-email 2.54.0 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Store the clock lookup table in the Rockchip clock provider allocation instead of allocating it separately. This ties the table lifetime directly to the provider and removes a separate allocation failure path while preserving the clk_onecell_data lookup interface. Assisted-by: Codex:GPT-5.5 Signed-off-by: Rosen Penev --- drivers/clk/rockchip/clk.c | 17 ++++------------- drivers/clk/rockchip/clk.h | 2 ++ 2 files changed, 6 insertions(+), 13 deletions(-) diff --git a/drivers/clk/rockchip/clk.c b/drivers/clk/rockchip/clk.c index ee8c79b938d3..dbb4b6f33abb 100644 --- a/drivers/clk/rockchip/clk.c +++ b/drivers/clk/rockchip/clk.c @@ -359,26 +359,21 @@ static struct rockchip_clk_provider *rockchip_clk_init_base( unsigned long nr_clks, bool has_late_clocks) { struct rockchip_clk_provider *ctx; - struct clk **clk_table; struct clk *default_clk_val; int i; default_clk_val = ERR_PTR(has_late_clocks ? -EPROBE_DEFER : -ENOENT); - ctx = kzalloc_obj(struct rockchip_clk_provider); + ctx = kzalloc_flex(*ctx, clk_table, nr_clks); if (!ctx) return ERR_PTR(-ENOMEM); - clk_table = kzalloc_objs(struct clk *, nr_clks); - if (!clk_table) - goto err_free; - for (i = 0; i < nr_clks; ++i) - clk_table[i] = default_clk_val; + ctx->clk_table[i] = default_clk_val; - ctx->reg_base = base; - ctx->clk_data.clks = clk_table; ctx->clk_data.clk_num = nr_clks; + ctx->clk_data.clks = ctx->clk_table; + ctx->reg_base = base; ctx->cru_node = np; spin_lock_init(&ctx->lock); @@ -388,10 +383,6 @@ static struct rockchip_clk_provider *rockchip_clk_init_base( "rockchip,grf"); return ctx; - -err_free: - kfree(ctx); - return ERR_PTR(-ENOMEM); } struct rockchip_clk_provider *rockchip_clk_init(struct device_node *np, diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h index 9e3503e2ffc2..d4033bf750f5 100644 --- a/drivers/clk/rockchip/clk.h +++ b/drivers/clk/rockchip/clk.h @@ -604,6 +604,7 @@ struct rockchip_aux_grf { * @grf: regmap of the general-register-files syscon * @aux_grf_table: hashtable of auxiliary GRF regmaps, indexed by grf_type * @lock: maintains exclusion between callbacks for a given clock-provider. + * @clk_table: clock lookup table. */ struct rockchip_clk_provider { void __iomem *reg_base; @@ -612,6 +613,7 @@ struct rockchip_clk_provider { struct regmap *grf; DECLARE_HASHTABLE(aux_grf_table, GRF_HASH_ORDER); spinlock_t lock; + struct clk *clk_table[]; }; struct rockchip_pll_rate_table { -- 2.54.0